[sdiy] fast opamp with low offset

[David G. Dixon]

> I was also thinking that it might be good to increase the current flow
> through 2164 (by decreasing the size of the resistor on the input and
> increasing the size of the integrator cap).  Of course, the higher cap
> charge would require a longer discharge time, but it could be 2164 current
> biases that are messing me up.  Another thing I thought of was to put a
> resistor between the JFET + cap and the summing node, but to bring the
> 2164 directly into the summing node.  This way the 2164 will be somewhat
> isolated from the switch, but the resistor won't load the 2164...

Well, these things seem largely to have solved the problem.  I doubled the
current into the 2164 (from 2.5uA at 0V CV to 5uA) and increased the
charging cap from 1nF to 2.2nF.  This drops the 0V CV frequency from 500Hz
to 455Hz.  I added a 220R resistor between the summing node and the junction
of the JFET and the charging cap.  I also added 100R on the 2164 output into
the summing node, although I'm not convinced that this actually does
anything.  I think I could stand to increase the 220R one as well, perhaps
to around 270R or 330R.  In addition to providing a little bit of isolation
from the spikes, this serves as a Franco resistor.  Finally, I tried 100pF
caps to ground from the ends of the two resistors opposite the summing node,
but they gave the J-shape a little bit at high frequencies and didn't really
help, so I removed them.  The ramp snapped back to a linear shape as soon as
I pulled them out of the breadboard.

With a bit of HF trim, I was getting 0.1% tracking up to about 7kHz.  I'd
like to do a bit better, but I can live with that.