[sdiy] Discrete buffer distortion

[Antti Huovilainen]

On Sat, 26 Sep 2009, Jerry Gray-Eskue wrote:

> It sounds like you are operating the transistor in the Small Signal 
> region, in this area of operation the output is non linear, once you hit 
> the large signal area the buffer should act in a close to linear 
> fashion.

This is not the case. Vdd = 4.5V, Vss = -4.5V, load is 150uA current sink 
to Vss. For low frequencies (or using low source impedance), the 
distortion is minimal (< 0.002%).

With 1M source impedance and 20 kHz sinewave, the distortion is 1.1%. Can 
the gate-drain capacitance really have this much effect on distortion?
How do any high speed high impedance circuits work then? (Oscilloscopes 
for example)

Antti

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