[sdiy] Dual oscillator cores?

cheater cheater cheater00 at gmail.com
Sun Oct 18 20:27:55 CEST 2009


Ah, good point with the capacitors. But I guess it doesn't have to be
a 'bad thing'. You can just assume two things: 1. the user might want
to change the oscillator swing (so the ratio between the length of the
A stage and the B stage) 2. An imperfect swing doesn't make the
oscillator less interesting sonically, since it still tracks well
(assumedly) even with caps that aren't matched that well

great pointer with regards to Don Tillman. He uses two accumulators
for a different reason obviously, but it's still related. I think
because of that design he ends up avoiding the HF problems as well,
right? After all he can switch the a core to the 'stopped' state
instantaneously, and then switch it to the 'reverse' state instantly
as well. He doesn't have to wait for the action of switching from
forward to reverse (which obviously can't happen instantaneously -
otherwise we'd end up shorting opposite voltage rails). Very
interesting. And he makes it work with thru-zero FM as well! Neat!

The next question is of whether and how you can find a matched pair of
capacitors =)

But more importantly: if the capacitors A and B are mismatched, e.g.
A's capacitance is 97% of B's capacitance: will both cores still track
the same (just with a botched symmetry)? I guess the symmetry/swing
will then be 48.5%. Will that number hold across all octaves? Or will
it be, say, 48.5% at C3 and 44.2% at C7? I don't know how to answer
this question - not even a clue where to start, to be honest!

Thanks
D.


On Sun, Oct 18, 2009 at 6:53 PM, Harry Bissell <harrybissell at wowway.com> wrote:
> For a dual core design, look up Don Tillman's
> trapezoidal VCO.
>
> The only drawback of a dual-core design is matching
> two capacitors very closely...
>
> H^) harry
>
>
>
> ----- Original Message -----
> From: cheater cheater <cheater00 at gmail.com>
> To: synth-diy <synth-diy at dropmix.xs4all.nl>
> Sent: Sun, 18 Oct 2009 13:03:40 -0400 (EDT)
> Subject: [sdiy] Dual oscillator cores?
>
> Hi guys,
> I was wondering if a design like this was tried somewhere already.. it
> seems basic enough that someone should have thought of it before :-)
> I'm not an expert at any rate, but I think it could work well to
> remove HF problems existent in some popular approaches at designing
> oscillator cores..
>
> Saw core. Two accumulators instead of one - call them A and B. Both
> are empty at the beginning. They both go out through one JFET each,
> that JFET works as a voltage controlled switch. They also both have
> their 'inputs' connected to one voltage controlled switch made out of
> a JFET each. (so two parallel chains of JFET -> Acc -> JFET). When you
> turn on the oscillator, accumulator A's input and output JFET are on
> and the accumulator starts being loaded. Each accumulator has one
> comparator each. When Acc A reaches the trigger level for comparator
> A, two things happen: 1. the input switch A is turned off 2. The input
> switch B is turned on 3. The output switch A is turned off. 4. The
> output switch B is turned on. At that point accumulator B is at level
> 0 and starts moving up towards comparator B's trip level. 5.
> Accumulator A gets drained. There is no delay while it's being
> drained, because it's B that is outputting at that point.
>
> Of course accumulator A becomes drained long before B reaches its trip
> point. Once B reaches its trip point, it gets swapped with A again.
>
> What are the main problems with such an approach that you guys can see?
>
> Thanks a lot
> Damian
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