[sdiy] while we're talking about scaling & biasing etc

[Neil Johnson]

Hi,

> i was going to have a 1k resistor between the opamp output and the 
> uproc pin, but i was advised that the ADC would be happier (read: 
> charge faster) when fed from a low impedance opamp output. i will try 
> this.

Where did this advice come from?  The Atmel datasheets typically call for a source impedance <10k, so a few hundres to 1k ohms shouldn't be a problem.

> >Better still if you also have a capacitor (e.g. 10n) between the ADC 
> >input and GND.  This minimizes the droop when the sampling capacitor 
> >(typ. a few 10's of pF) is connected.
> 
> ok i will try this too.

Let us know how it goes!

> would the actual voltage make any difference to these potential ring 
> situations? the signal at 5v is pretty stable, only when it gets 
> towards 0v does it get crazy.

It may, it may not.  Depends on may things, for example the existing charge on the S+H capacitor just prior to the sample.

> ps big lesson learned #1: learn a schem application, draw up the 
> schem, and have it reviewed, before building the prototype!

Add to the list:
  "Read VERY CAREFULLY the datasheets of the devices you are using"

For Atmel devices, the datasheets have quite a lot of information in them.  For example, the AVR datasheets have a good section on the ADC, with schematics of the input circuitry showing the sampling capacitor, with notes on source impedances, etc.

Cheers,
Neil
--
http://www.njohnson.co.uk