[sdiy] while we're talking about scaling & biasing etc

[Jason Proctor]

thanks for the suggestions.

>Not specific to the MC34072, but do you have a resistor (say 100-220 
>ohms) in series between the output of the op-amp and the input to 
>the ADC?  When the ADC samples it puts a small capacitor on the 
>input, which can cause an op-amp to ring.

i was going to have a 1k resistor between the opamp output and the 
uproc pin, but i was advised that the ADC would be happier (read: 
charge faster) when fed from a low impedance opamp output. i will try 
this.

>Better still if you also have a capacitor (e.g. 10n) between the ADC 
>input and GND.  This minimizes the droop when the sampling capacitor 
>(typ. a few 10's of pF) is connected.

ok i will try this too.

would the actual voltage make any difference to these potential ring 
situations? the signal at 5v is pretty stable, only when it gets 
towards 0v does it get crazy.

thanks,
j

ps big lesson learned #1: learn a schem application, draw up the 
schem, and have it reviewed, before building the prototype!