[sdiy] looking for old DIY articles with RAM projects
Magnus Danielson
magnus at rubidium.dyndns.org
Tue Jun 23 02:47:36 CEST 2009
Scott Nordlund wrote:
> I guess it could be slightly tricky to find the right source of info, since 70's or 80's DIY computer stuff may focus on assembly language while modern computer architecture texts would be more about cache, pipelining, etc.
>
> You might do best with something that focuses on the basics of simple 8/16-bit computer hardware design (chip enable lines, address bus, bidirectional data bus, timing diagrams..), after which the SRAM and DRAM datasheets should be fairly straightforward.
>
> Also maybe it would be helpful to start think about ROM/EPROM chips first, since they basically work the same an SRAM with no ability to write (I mean the interface as it's ordinarily used, not the internal structure or when connected to an EPROM burner).
I would pick any simple and why not classic 8 bit CPU, 6502 or Z80 would
work just fine.
I would divide down the CPU clock to some suitable sampling frequency.
The sampling frequency then drives the A/D and D/A as well as interrupt
line of the CPU.
Now, the CPU has a small EPROM with the program. The RAM is used as a
circular buffer. The A/D is read and written into the FIFO in increasing
addresses. The CPU then reads out n samples later (lower in the memory).
The address calculation needs to be done modulus the length of the delay
memory, which most suitably is done in power of 2th in which case an and
operation would solve it neatly. If more convenient this calculation
could be made so that the A/D writes is done decreasing, in which case
the delay of n is achieved by calculating the read address by just add n
rather than substract it. This read/write processing occurs in the
interrupt, short and swift.
The main-loop does the I/O processing, that is, read what ever input
register there is, calculate the delay value n and then write it into
the parameter RAM. It could also do some fancy display-stuff so it
drives some LED-display or something. A sneaky variant is to let the top
of the memory be the variable area and use a comparision against the
first address of that range to detect the wrapping of the address.
The digital side should be fairly straight-forward using SRAM. The
analog side needs to be done with some care, as there need to be
suitable anti-aliasing filters. Butterworth or Bessel responses is most
suitfull for the task.
Should not be too hard to cook up from scratch. The assembler code
should be fairly minimal too.
Cheers,
Magnus
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