[sdiy] using 6264 Ram
David Anderson
andersdl at buffalo.edu
Tue Jun 16 20:57:13 CEST 2009
Fernando, Jerry's right. You should be able to substitute a single 6116 (16k, 2k
x 8bit) chip via an adapter board. Since the processor is a Z80, it's probably
organized as 8 bits wide, not 16, which means you have 2K of ram. I took a quick
look at the 6518 and here's my suggestion. The 6518 has full address lines, so
you can map those directly to the address lines of the 6518 (A0 to A9) to the
same lines on the 6116. Since the 6518 are 1k chips, I'm guessing they're
arranged into two banks of 8. The second bank likely has A10 from the Z80
connected to the A9 line. You should be able to connect the A10 from the Z80
directly to the A10 of the 6116.
Similarly, you can connect the databus (D0-D7) to the I/O 0-7 of the 6116.
Write enable, chip select, etc, will need to be properly mapped. I didn't
immediately find a datasheet for the 6518; I think you'll need it to fully
understand the other mappings to translate from the 6518 to the 6116.
Finally, if you do a daughterboard, consider doing it at the Z80 socket so that
you pull the Z80, stick your board in, and plug the Z80 into that.
David
On Tue 06/16/09 2:38 AM , "Jerry Gray-Eskue" jerryge at cableone.net sent:
>
> Fernando,
>
> I do not know of a source for the HM6518, If you can find them they may
> bevery expensive.
>
> You might however use a static ram part such as the 6264 ram by using a
> Pairof parts to 16 bits wide. The extra address lines on the 6264 can be
> tiedlogic low reducing the size to 16*1024 ( the same size as 16 1X1024 parts
> ).This would involve heavy modifications to the board OR making an
> adapterboard, and should only be attempted is you are very failure with
> digitalmemory. Just about any TTL compatible Static Ram part(s), 2 8bit wide - OR
> 116bit wide, could be used as long as it is rated to run at least at the
> rate(speed) of the HM6518.
>
> -Jerry
>
> -----Original Message-----
> From: Cunha Fernando [fer5 at free.fr
> ]Sent: Tuesday, June 16, 2009 11:57 AM
> To: 'Jerry Gray-Eskue'
> Subject: RE: [sdiy] using 6264 Ram
>
>
> Hi
> I'm French and new on this forum and I've seen your description what
> aboutthe static ram
> Very interesting .
> I have one NEVE 8108 with Z80 processor to control the matrix and this
> boardcontents static memory
> to backup the rooting channels ,I have 16x HM6518 (1X1024) and I search
> tofind some ones to emergency repair
> have you knowledge were can I find this vintage memories ,it's very hard
> tofind
> Thanks
> Fernando from Paris
>
>
>
> -----Message d'origine-----
> De : synth-diy-bounces at dropmix.xs4all.nl[synth-diy-bounces at dropmix.xs4all.nl]
De la part de Jerry
> Gray-EskueEnvoyé : mardi 16 juin 2009 06:25
> � : S
> ynth-diy at dropmix.xs4all.nlObjet : RE: [sdiy] using 6264 Ram
>
> Dan,
>
> This is a Static Ram part so it is not to difficult to use, it usually
> willnot have Valid data when it is first powered up but some times these
> canretain a data image without power for a while but do not count on it.
> Alwaysassume that the data is garbage on power up.
>
> The control details are in the Read and Write timing wave forms.
>
> I will try to give you a verbal description of operation, hopefully
> withoutany mistakes..
>
> Here are some details:
>
> It is TTL compatible so the all the Logic High and Low signals are TTL
> levels.
>
> The Address lines are A0 to A12 these select a Memory location to read
> orwrite, you have to setup an address on these lines before you do
> anythingelse.
>
> The Data lines are I/O1 to I/O8, this is where you set up valid data to
> Write to the memory and where you Read valid data from the memory. For
> aWrite cycle these are Inputs to the chip, on a Read cycle they are
> Outputsfrom the part. When the Chip is not enabled this lines are in the Third
> State - this is they are not inputs or outputs, basically they are
> disconnected inside the chip.
>
> In the data sheet a Pin name like CS2 means this control is ON with a
> LogicHIGH
> a slash in front of the name means NOT so /OE is ON with a logic LOW
>
> ======== To Write Data ==========
>
> Set these logic levels:
>
>
> /OE High - Output Enable is OFF
> /WE High - Write Enable is OFF
> ==== These two lines do the same thing, you can tie one of them to a
> fixedvoltage
> i.e. /CS1 LOW **OR** CS2 HIGH -and use the other for full control of
> thechip.
> /CS1 High - Chip Select 1 is OFF
> CS2 Low - Chip select 2 is OFF
> ====
> Setup your address on the A0 to A12 lines.
>
>
> Set these logic levels:
>
> /WE LOW - Write Enable is ON
> /CS1 LOW - Chip Select 1 is ON
> CS2 HIGH - Chip select 2 is ON
>
> Setup the 8 bit data to save in memory (Drive the lines now).
>
> Set these logic levels:
>
> ==== This is when the data is Saved in the chip memory ===
> /WE High - Write Enable is OFF
> =========
> /CS1 High - Chip Select 1 is OFF
> CS2 Low - Chip select 2 is OFF
>
> Stop Driving the Data lines.
>
> ======== Write is done ===========
>
> ======== To Read Data ==========
>
> Set these logic levels:
>
>
> /OE High - Output Enable is OFF
> /WE High - Write Enable is OFF
> /CS1 High - Chip Select 1 is OFF
> CS2 Low - Chip select 2 is OFF
>
> Setup your address on the A0 to A12 lines.
>
>
> Set these logic levels:
>
> /OE LOW - Output Enable is ON
> /CS1 LOW - Chip Select 1 is ON
> CS2 HIGH - Chip select 2 is ON
>
> The 8 bit data is available ( Driven by the Chip ) on the Data I/O
> lines.This is when you would Latch or use the data from the memory chip.
>
> Set these logic levels:
>
> /OE High - Output Enable is OFF
> /CS1 High - Chip Select 1 is OFF
> CS2 Low - Chip select 2 is OFF
>
> The Chip Stops Driving the Data lines.
>
> ======== Read is done ===========
>
> The timing is critical to making this device work, but the critical end
> fora Static part is it will only go so fast but works just fine at very
> slowspeeds. The most important thing is that each step is in the same order
> shown on the timing diagrams.
>
> If you are tiring to run it at the 100 ns access times (Full Speed )
> youwill have to respect all the minimum times shown in the timing diagrams
> .
> - Jerry
>
> -----Original Message-----
> From:
synth-diy-bounces at dropmix.xs4all.nl[synth-diy-bounces at dropmix.xs4all.nl]On Behalf
Of Dan
> SnazelleSent: Tuesday, June 16, 2009 9:15 AM
> To: s
> ynth-diy at dropmix.xs4all.nlSubject: [sdiy] using 6264 Ram
>
>
>
> hey there
>
> I am trying to figure out how to control and use a 6264 ram chip.
>
> (hm6264lp in my case)
>
> I cant currently find any good synth schematics that use these so if
> anyoneknows of any, that would be great.
>
> the datasheet doesnt give any application notes so I am a bit lost
> rightnow.
>
>
> Any help appreciated!
>
> thanks
>
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