[sdiy] using 6264 Ram

Tue Jun 16 20:21:07 CEST 2009

dont worry when i said a square wave i meant the out of an ADC

which puts out pulses

--------------------------------------------
check out various dan music at:

http://www.myspace.com/lossnyc

(updated monthly)

http://www.soundclick.com/lossnyc.htm

http://www.indie911.com/dan-snazelle

(or for techno) http://www.myspace.com/snazelle

ALSO check out Dan synth/Fx projects:

AUDIO ARK:

www.youtube.com/watch?v=TJRpvaOcUic

www.youtube.com/watch?v=BqIa_lXQNTA&feature=channel_page

www.youtube.com/watch?v=V4nJPjGgOcU&feature=channel_page

and soundtrack/design work:

NEW: check out Dan's sound design from the 1998 award winning film SAFARI by catherine chalmers

http://www.catherinechalmers.com/videos.cfm

----------------------------------------
> From: jerryge at cableone.net
> To: Synth-diy at dropmix.xs4all.nl
> Subject: RE: [sdiy] using 6264 Ram
> Date: Tue, 16 Jun 2009 00:03:13 -0500
> CC:
>
>
> Ok now I am confused.
>
> It sounds like you are tiring to save Analog data (0-5 volts) in the Ram. If
> that is what you mean this is not the correct part. The Ram chip will only
> save a TTL Logic Level - High or Low - 1 or 0.
>
> To store a waveform you would use an Analog to Digital converter - Store
> several samples in Ram - Then read the samples to a Digital to Analog
> converter for Analog output.
>
> There have been from time to time Analog memory devices available but this
> is not one of them.
>
>
>
> -----Original Message-----
> From: Dan Snazelle [mailto:subjectivity at hotmail.com]
> Sent: Tuesday, June 16, 2009 10:42 AM
> To: jerryge at cableone.net; sdiy
> Subject: RE: [sdiy] using 6264 Ram
>
>
>
> ok
>
> thank you so much for your great description of how to use it.
>
> i am printing it now.
>
> my final question has to do with the connection on the I/O lines.
>
> Lets say I want to WRITE an incoming signal...lets assume its a square wave
> of some kind (0-5 volts).
>
> now lets also assume I want this same pin to send the Signal on to my Opamp
> output once it is stored and in READ mode.
>
> so my question is this, as long as i have the OUTPUT from the I/O pin well
> buffered and I have my INPUT part of the signal path coming straight into
> the pin
> (through a resistor?), when the pin goes into write mode, will it properly
> store what i have coming IN (the sqaure wave) or will that output line
> (the opamp going to an out jack) screw it all up?
>
> I dont think i have ever used tri-state pins or pins that were both INS and
> OUTS so i wasnt sure if i would need to have cmos switches turning from the
> IN path
> to the OUT path each time it went from read to write.
>
>
> sorry for being slow.
>
> thanks a lot everybody!
>
>
>
>
>
>
> --------------------------------------------
> check out various dan music at:
>
> http://www.myspace.com/lossnyc
>
> (updated monthly)
>
> http://www.soundclick.com/lossnyc.htm
>
>
>
> http://www.indie911.com/dan-snazelle
>
> (or for techno) http://www.myspace.com/snazelle
>
> ALSO check out Dan synth/Fx projects:
>
> AUDIO ARK:
>
> www.youtube.com/watch?v=TJRpvaOcUic
>
> www.youtube.com/watch?v=BqIa_lXQNTA&feature=channel_page
>
> www.youtube.com/watch?v=V4nJPjGgOcU&feature=channel_page
>
> and soundtrack/design work:
>
> NEW: check out Dan's sound design from the 1998 award winning film SAFARI by
> catherine chalmers
>
> http://www.catherinechalmers.com/videos.cfm
>
>
>
>
>
>
> ----------------------------------------
>> From: jerryge at cableone.net
>> To: Synth-diy at dropmix.xs4all.nl
>> Subject: RE: [sdiy] using 6264 Ram
>> Date: Mon, 15 Jun 2009 23:25:11 -0500
>> CC:
>>
>> Dan,
>>
>> This is a Static Ram part so it is not to difficult to use, it usually
> will
>> not have Valid data when it is first powered up but some times these can
>> retain a data image without power for a while but do not count on it.
> Always
>> assume that the data is garbage on power up.
>>
>> The control details are in the Read and Write timing wave forms.
>>
>> I will try to give you a verbal description of operation, hopefully
> without
>> any mistakes..
>>
>> Here are some details:
>>
>> It is TTL compatible so the all the Logic High and Low signals are TTL
>> levels.
>>
>> The Address lines are A0 to A12 these select a Memory location to read or
>> write, you have to setup an address on these lines before you do anything
>> else.
>>
>> The Data lines are I/O1 to I/O8, this is where you set up valid data to
>> Write to the memory and where you Read valid data from the memory. For a
>> Write cycle these are Inputs to the chip, on a Read cycle they are Outputs
>> from the part. When the Chip is not enabled this lines are in the Third
>> State - this is they are not inputs or outputs, basically they are
>> disconnected inside the chip.
>>
>> In the data sheet a Pin name like CS2 means this control is ON with a
> Logic
>> HIGH
>> a slash in front of the name means NOT so /OE is ON with a logic LOW
>>
>> ======== To Write Data ==========
>>
>> Set these logic levels:
>>
>>
>> /OE High - Output Enable is OFF
>> /WE High - Write Enable is OFF
>> ==== These two lines do the same thing, you can tie one of them to a fixed
>> voltage
>> i.e. /CS1 LOW **OR** CS2 HIGH -and use the other for full control of the
>> chip.
>> /CS1 High - Chip Select 1 is OFF
>> CS2 Low - Chip select 2 is OFF
>> ====
>> Setup your address on the A0 to A12 lines.
>>
>>
>> Set these logic levels:
>>
>> /WE LOW - Write Enable is ON
>> /CS1 LOW - Chip Select 1 is ON
>> CS2 HIGH - Chip select 2 is ON
>>
>> Setup the 8 bit data to save in memory (Drive the lines now).
>>
>> Set these logic levels:
>>
>> ==== This is when the data is Saved in the chip memory ===
>> /WE High - Write Enable is OFF
>> =========
>> /CS1 High - Chip Select 1 is OFF
>> CS2 Low - Chip select 2 is OFF
>>
>> Stop Driving the Data lines.
>>
>> ======== Write is done ===========
>>
>> ======== To Read Data ==========
>>
>> Set these logic levels:
>>
>>
>> /OE High - Output Enable is OFF
>> /WE High - Write Enable is OFF
>> /CS1 High - Chip Select 1 is OFF
>> CS2 Low - Chip select 2 is OFF
>>
>> Setup your address on the A0 to A12 lines.
>>
>>
>> Set these logic levels:
>>
>> /OE LOW - Output Enable is ON
>> /CS1 LOW - Chip Select 1 is ON
>> CS2 HIGH - Chip select 2 is ON
>>
>> The 8 bit data is available ( Driven by the Chip ) on the Data I/O lines.
>> This is when you would Latch or use the data from the memory chip.
>>
>> Set these logic levels:
>>
>> /OE High - Output Enable is OFF
>> /CS1 High - Chip Select 1 is OFF
>> CS2 Low - Chip select 2 is OFF
>>
>> The Chip Stops Driving the Data lines.
>>
>> ======== Read is done ===========
>>
>> The timing is critical to making this device work, but the critical end
> for
>> a Static part is it will only go so fast but works just fine at very slow
>> speeds. The most important thing is that each step is in the same order
>> shown on the timing diagrams.
>>
>> If you are tiring to run it at the 100 ns access times (Full Speed ) you
>> will have to respect all the minimum times shown in the timing diagrams .
>>
>> - Jerry
>>
>> -----Original Message-----
>> From: synth-diy-bounces at dropmix.xs4all.nl
>> [mailto:synth-diy-bounces at dropmix.xs4all.nl]On Behalf Of Dan Snazelle
>> Sent: Tuesday, June 16, 2009 9:15 AM
>> To: synth-diy at dropmix.xs4all.nl
>> Subject: [sdiy] using 6264 Ram
>>
>>
>>
>> hey there
>>
>> I am trying to figure out how to control and use a 6264 ram chip.
>>
>> (hm6264lp in my case)
>>
>> I cant currently find any good synth schematics that use these so if
> anyone
>> knows of any, that would be great.
>>
>> the datasheet doesnt give any application notes so I am a bit lost right
>> now.
>>
>>
>> Any help appreciated!
>>
>> thanks
>>
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