[sdiy] using 6264 Ram

[Jerry Gray-Eskue]

Fernando,

I do not know of a source for the HM6518, If you can find them they may be
very expensive.

You might however use a static ram part such as the 6264 ram by using a Pair
of parts to 16 bits wide. The extra address lines on the 6264 can be tied
logic low reducing the size to 16*1024 ( the same size as 16 1X1024 parts ).
This would involve heavy modifications to the board OR making an adapter
board, and should only be attempted is you are very failure with digital
memory. Just about any TTL compatible Static Ram part(s), 2 8bit wide - OR 1
16bit wide, could be used as long as it is rated to run at least at the rate
(speed) of the HM6518.

-Jerry

-----Original Message-----
From: Cunha Fernando [mailto:fer5 at free.fr]
Sent: Tuesday, June 16, 2009 11:57 AM
To: 'Jerry Gray-Eskue'
Subject: RE: [sdiy] using 6264 Ram


Hi
I'm French and new on this forum and I've seen your description what about
the static ram
Very interesting .
I have one NEVE 8108 with Z80 processor to control the matrix and this board
contents static memory
to backup the rooting channels ,I have 16x HM6518 (1X1024) and I search to
find some ones to emergency repair
have you knowledge were can I find this vintage memories ,it's very hard to
find
Thanks
Fernando from Paris



-----Message d'origine-----
De : synth-diy-bounces at dropmix.xs4all.nl
[mailto:synth-diy-bounces at dropmix.xs4all.nl] De la part de Jerry Gray-Eskue
Envoyé : mardi 16 juin 2009 06:25
À : Synth-diy at dropmix.xs4all.nl
Objet : RE: [sdiy] using 6264 Ram

Dan,

This is a Static Ram part so it is not to difficult to use, it usually will
not have Valid data when it is first powered up but some times these can
retain a data image without power for a while but do not count on it. Always
assume that the data is garbage on power up.

The control details are in the Read and Write timing wave forms.

I will try to give you a verbal description of operation, hopefully without
any mistakes..

Here are some details:

It is TTL compatible so the all the Logic High and Low signals are TTL
levels.

The Address lines are A0 to A12 these select a Memory location to read or
write, you have to setup an address on these lines before you do anything
else.

The Data lines are I/O1 to I/O8, this is where you set up valid data to
Write to the memory and where you Read valid data from the memory. For a
Write cycle these are Inputs to the chip, on a Read cycle they are Outputs
from the part. When the Chip is not enabled this lines are in the Third
State - this is they are not inputs or outputs, basically they are
disconnected inside the chip.

In the data sheet a Pin name like CS2 means this control is ON with a Logic
HIGH
a slash in front of the name means NOT so /OE is ON with a logic LOW

======== To Write Data ==========

Set these logic levels:


/OE High - Output Enable is OFF
/WE High - Write Enable is OFF
==== These two lines do the same thing, you can tie one of them to a fixed
voltage
i.e. /CS1 LOW **OR** CS2 HIGH -and use the other for full control of the
chip.
/CS1 High - Chip Select 1 is OFF
CS2 Low - Chip select 2 is OFF
====
Setup your address on the A0 to A12 lines.


Set these logic levels:

/WE LOW - Write Enable is ON
/CS1 LOW - Chip Select 1 is ON
CS2 HIGH - Chip select 2 is ON

Setup the 8 bit data to save in memory (Drive the lines now).

Set these logic levels:

==== This is when the data is Saved in the chip memory ===
/WE High - Write Enable is OFF
=========
/CS1 High - Chip Select 1 is OFF
CS2 Low - Chip select 2 is OFF

Stop Driving the Data lines.

======== Write is done ===========

======== To Read Data ==========

Set these logic levels:


/OE High - Output Enable is OFF
/WE High - Write Enable is OFF
/CS1 High - Chip Select 1 is OFF
CS2 Low - Chip select 2 is OFF

Setup your address on the A0 to A12 lines.


Set these logic levels:

/OE LOW - Output Enable is ON
/CS1 LOW - Chip Select 1 is ON
CS2 HIGH - Chip select 2 is ON

The 8 bit data is available ( Driven by the Chip ) on the Data I/O lines.
This is when you would Latch or use the data from the memory chip.

Set these logic levels:

/OE High - Output Enable is OFF
/CS1 High - Chip Select 1 is OFF
CS2 Low - Chip select 2 is OFF

The Chip Stops Driving the Data lines.

======== Read is done ===========

The timing is critical to making this device work, but the critical end for
a Static part is it will only go so fast but works just fine at very slow
speeds. The most important thing is that each step is in the same order
shown on the timing diagrams.

If you are tiring to run it at the 100 ns access times (Full Speed ) you
will have to respect all the minimum times shown in the timing diagrams .

- Jerry

-----Original Message-----
From: synth-diy-bounces at dropmix.xs4all.nl
[mailto:synth-diy-bounces at dropmix.xs4all.nl]On Behalf Of Dan Snazelle
Sent: Tuesday, June 16, 2009 9:15 AM
To: synth-diy at dropmix.xs4all.nl
Subject: [sdiy] using 6264 Ram



hey there

I am trying to figure out how to control and use a 6264 ram chip.

(hm6264lp in my case)

I cant currently find any good synth schematics that use these so if anyone
knows of any, that would be great.

the datasheet doesnt give any application notes so I am a bit lost right
now.


Any help appreciated!

thanks

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