[sdiy] How droopy is too droopy in a S & H?
Veronica Merryfield
veronica.merryfield at shaw.ca
Tue Jan 27 05:45:13 CET 2009
I'd probably build in the log conversion stage into the micro as well.
If there was a pic or similar with two 12 bit DACs and a comparator,
one could implement it with few external components.
On 26-Jan-09, at 4:14 PM, John Luciani wrote:
> On Mon, Jan 26, 2009 at 5:29 PM, mark verbos <mverbos at earthlink.net>
> wrote:
>> I can only imagine that working for me if 8 bits is enough for
>> pitch. ,
>> since that's the biggest parallel converter I know of.
>>
>> It's probably not, Is it?
>
> I would go with 11 or 12 bits for pitch.
>
> Analog Devices has a number of 12 bit A/Ds and D/As that have 12
> data lines.
> With some glue logic (or a simple uC or FPGA) you could do duals or
> quads.
> Checkout TI and Maxim as well.
>
> (* jcl *)
>
> --
>
> You can't create open hardware with closed EDA tools.
>
> http://www.luciani.org
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