[sdiy] Proposed DSP board

[Rainer Buchty]

On Fri, 23 Jan 2009, cheater cheater wrote:

> What is the difference between FPGA's and FPLA's? In layman terms*

PLAs have an input and an output matrix. Think of a ROM as a PLA with a 
fixed input matrix (address decoder) and a programmable output matrix 
(data to be stored). A PAL is the other way round -- fixed output matrix 
(logic level) and programmable input matrix (logic terms).

By today's classification, PALs are SPLDs (simple programmable logic 
devices); cluster more than one PAL into one chip with some dedicated, 
hierarchic routing and you get a CPLD (complex...)

FPGAs in terms are gate-array inspired. Have a lot of rather incomplex 
logic cells and most flexible routing.

These days these logic cells are not so light-weight anymore plus you'll 
find all sorts of nifty things on the FPGAs like dedicated I/O 
transmitters, CPU cores, multipliers, or dedicated DSP blocks.

To sum it up in a few words:

(1) SPLDs/CPLDs
 - are matrix-based with rather inflexible, hierarchical routing 
   (and therefore homogenous, somewhat constant, fast, and easily 
   predictable signal run times)
 - have few, but large logic blocks
 - centralized, global routing scheme
 - typically less than 100k gate equivalents, usually not more than 25k 

(2) FPGAs	
 - routing-based
 - have many, but (originally) small logic blocks (not sure whether 
   7-input functions count as "small" these days)
 - decentral, local routing scheme
 - up to millions of gate equivalents, current chips easily holt entire 
   SoCs
 
Rainer