[sdiy] Proposed DSP board

Neil Johnson neil.johnson97 at ntlworld.com
Thu Jan 22 18:45:50 CET 2009


Hi,

Scott Gravenhorst wrote: 
> >FPGA is good for parallelizable algorithms, and where the design is mostly
> > fixed. 
> 
> Can you explain what you mean by "mostly fixed" ?

*My* definition (yours may vary) is where the usual FPGA stop-the-world-and-reload-the-bitstream implies some level of 'fixed'.  *Some* DSPs can load modified/different code at runtime so there is no penalty to update the system when live.  For example, loading a bugfixed MP3 codec while decoding a JPEG image or rendering a MIDI file.

Of course, if you're into modifying the FPGA configuration after the initial bitstream load then this is not so much an issue, other than the limitations of what you can modify without affecting the 'live' parts of the FPGA - you can go down routes of locking parts of the design during P-n-R so that config updates don't mess with live parts of the FPGA (and by 'live' I mean those parts of the FPGA that are currently handling data at the time the update takes place).

Bringing this back somewhere near the topic, I think this thread is an excellent example of what happens when you ask on-list what features a module should have!   A thousand eyes, a million opinions.  Entertaining at the very least.

For Tim, I'd suggest do whatever you want that makes it interesting for you.  You'll never design a board that meets everyone's requirements.  This is synth-diy - whatever you do, do it because its fun!

I leave it as an exercise for the reader to define "fun".

Cheers,
Neil
--
http://www.njohnson.co.uk




More information about the Synth-diy mailing list