[sdiy] dsPIC fun board
Ingo Debus
igg.debus at t-online.de
Sun Jan 18 12:27:35 CET 2009
Am 17.01.2009 um 23:10 schrieb Eric Brombaugh:
> This is true. The only caveat is that the write endurance of the on-
> chip flash in the dsPIC is somewhat limited. MCHP only guaranteed
> about 1000 cycles for the initial parts, although they may have
> upped since I last looked. That's plenty for development purposes,
> but for use as non-volatile storage in the end application it might
> be a bit shy of what's needed.
>
Oops. Finally I found that parameter in the data sheet of the
dsPIC33. It's on page 272, called Cell Endurance. 1000 is the typical
number, the minimum is only 100! (I hope I got this right, I have no
idea what the unit E/W means)
I had Atmel processors on my mind, where 100k Write Cycles are
specified for the Flash memory (AT89C51RD2/ED2).
Funny that there's such a big difference.
>> Also, in my experience, EEPROMs are unreliable.
>
> This interests me. What specifically were the pitfalls you
> experienced in using EEPROM?
It happened very rarely, but sometimes stored data were corrupted. I
don't know why. The EEPROM wasn't written very often. There was
additional circuitry that prevented unallowed states of the chip
enable line during power-up/down.
Of course you can always add redundancy in software since EEPROM are
often much larger than needed (store the data twice, use checksums
etc). But this means additional programming effort.
Ingo
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