[sdiy] level shifting

Fri Jan 9 00:19:37 CET 2009

"> Dan,
>
> Level shifting with inverting opamps is a little bit tricky"

yeah well lucky for me i am terrible at math.

i need to figure out how to do this on a calculator.

one thing...is it any easier with a non inverting amp?

thanks for the help.

----------------------------------------
> Date: Thu, 8 Jan 2009 14:12:31 -0800
> From: dixon at interchange.ubc.ca
> Subject: RE: [sdiy] variable width pulse wave for JEFT sample and hold
> To: subjectivity at hotmail.com; synth-diy at dropmix.xs4all.nl
>
> Dan,
>
> Level shifting with inverting opamps is a little bit tricky. It is not as
> intuitive as one would hope. For example, having a +5V reference voltage at
> the (+) input terminal does not necessarily shift the output by +5V!
>
> The best way to figure this out is actually to analyze the opamp circuit.
> Draw the opamp, the input resistor and the feedback resistor, both taken as
> R. Apply the input voltage V_in to the input resistor. Now, assume a
> reference voltage V_ref at the input terminals. What is the output voltage
> at a given input voltage?
>
> Well, the current through the input resistor is I = (V_in - V_ref)/R. As no
> current flows through the input terminals, the current through the feedback
> resistor is also I = (V_in - V_ref)/R = (V_ref - V_out)/R. Rearranging,
> V_out = 2*V_ref - V_in. Hence, to get a +5V offset, V_ref must be +2.5V,
> and the voltage divider resistors must have the ratio 5:1 for a +15V rail
> voltage, or 19:5 for a +12V rail voltage.
>
> If you have a summing amp with two inputs, each with R-valued input
> resistors, then things are different. Assuming both are feeding V_in, then
> the net current through both inputs (and through the feedback resistor) is I
> = 2*(V_in - V_ref)/R = (V_ref - V_out)/R. Hence, in this case, V_out =
> 3*V_ref - 2*V_in. Now, 2*V_in is what you want from the summation of the
> two inputs. However, 3*V_ref is the offset. Hence, to get an output offset
> of +5V, the reference voltage must be +1.67V, and now the voltage divider
> resistors must have the ratio 8:1 for a +15V rail voltage, or 31:5 for a
> +12V rail voltage.
>
> Clear as mud? This stymied me too, until I realized that this is one of
> those situations in electronics where you really must do the maths!
>
> Cheers,
> Dave
>
>
> David G. Dixon
> Professor
> Department of Materials Engineering
> University of British Columbia
> 309-6350 Stores Road
> Vancouver, B.C. V6T 1Z4
> Canada
>
> Tel 1-604-822-3679
> Fax 1-604-822-3619
>
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>
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> -----Original Message-----
> From: Dan Snazelle [mailto:subjectivity at hotmail.com]
> Sent: Thursday, January 08, 2009 11:26 AM
> To: dixon at interchange.ubc.ca; synth-diy at dropmix.xs4all.nl
> Subject: RE: [sdiy] variable width pulse wave for JEFT sample and hold
>
>
>
> This statement brings up an issue i still am trying to learn..
> how to level shift signals and voltages
> (or voltage shift or offset)
>
> it seems you are saying to do something like this:
>
> input the square wave into a 102 cap with a 10k resistor to grnd. then the
> level shift: plug the signal into the inverting
> input of an opamp, which on the non inverting input has a voltage divider (
> 2 to 1 would that mean a 100k to + and 50k to gnd?
>
>
> i would LOVE to be able to figure out this SHIFTING thing.
>
> does anyone know of a chapter in any of the common opamp books that talks
> about it? is it technically called voltage shifting? or voltage offset?
>
> thanks
>
>
> I keep on learning new junk everyday
>> Why not just use an RC high-pass filter with a time constant of about 10
> us
>> to generate spikes from the square (0.001 uF and 10 k will do nicely), and
>> then shift the pulses with a unity-gain inverting opamp with a voltage 2:1
>> divider off the positive input between -15V and 0V so that the output DC
>> rides at about -5V and the spikes go up to 0V to trigger the JFET (which,
> I
>> presume, is npn and therefore is full off at about -3.5V and full on at
>> about 0V)?
>>
>>
>> David G. Dixon
>> Professor
>> Department of Materials Engineering
>> University of British Columbia
>> 309-6350 Stores Road
>> Vancouver, B.C. V6T 1Z4
>> Canada
>>
>> Tel 1-604-822-3679
>> Fax 1-604-822-3619
>>
>> "PERFECTA FINGAMUS SERVIAT NATURA"
>>
>> The information in this email and in any attachments is confidential and
>> intended solely for the attention and use of the named addressee(s). It
>> must not be disclosed to any person without the writer's authority. If
> you
>> are not the intended recipient, or a person responsible for delivering it
> to
>> the intended recipient, you are not authorized to and must not disclose,
>> copy, distribute, or retain this message or any part of it.
>>
>> -----Original Message-----
>> From: synth-diy-bounces at dropmix.xs4all.nl
>> [mailto:synth-diy-bounces at dropmix.xs4all.nl] On Behalf Of Dan Snazelle
>> Sent: Tuesday, January 06, 2009 9:14 AM
>> To: synth-diy at dropmix.xs4all.nl
>> Subject: [sdiy] variable width pulse wave for JEFT sample and hold
>>
>>
>> i am trying to find a way to get a variable pulse wave from a square so
> that
>> i can successfully clock a sample and hold built around a JFET (pn4391)
>>
>> i am having no luck with a regular square wave.
>>
>> thanks
>>
>>
>>
>>
>>
>>
>> --------------------------------------------
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>>
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>>
>>
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>>
>>
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