[sdiy] Problem with DCO

Roy J. Tellason rtellason at verizon.net
Fri Feb 13 21:13:52 CET 2009


On Friday 13 February 2009 01:22:05 pm Tom Wiltshire wrote:
> Hi All,
>
> I've been experimenting with a DCO design based on the Roland JX8P
> circuit:
>
> http://www.electricdruid.com/DCOTestDesign.gif
>
> Broadly speaking, it works, in that I can get a ramp wave out of it
> if I adjust the 47K pot on the left. This pot and op-amp buffer will
> be replaced by a DAC when I get it working better. I've got reset
> pulses generated by a PIC being fed into the base of the transistor
> at 440Hz for the purposes of the test. That part is fine.
>
> The problem is that the output goes from 0V down to -0.5V and then
> seems to saturate. What's going on? How can the op-amp output be
> saturated at only -0.5V when it's running on +/-15V rails? Everything
> I've read suggests that the output from an integrator ought to carry
> on as far as the op-amp output can take it, so I was expecting a ramp
> from 0V down to -15V or thereabouts. I'm sure there's something I'm
> missing here...
>
> Thanks for any clues,
> Tom

First thing that jumps out at me is that when your ramp starts going negative 
the transistor collector gets _forward biased_,  which is probably not what 
you intended...

With the other op amp acting as a voltage follower to give you somewhere in 
the range of 0-5V,  the output of the second op amp is _only_ going to go 
negative -- maybe try a PNP transistor there instead?

-- 
Member of the toughest, meanest, deadliest, most unrelenting -- and
ablest -- form of life in this section of space,  a critter that can
be killed but can't be tamed.  --Robert A. Heinlein, "The Puppet Masters"
-
Information is more dangerous than cannon to a society ruled by lies. --James 
M Dakin



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