[sdiy] Polyevolver internals

[Antti Huovilainen]

On Wed, 30 Dec 2009, Tom Wiltshire wrote:

> In my book, that's quite a lot more difficult than the DCO reset. I've 
> done some experiments with bandlimited steps, and you need a fairly 
> large table to store your step (e.g. some memory) and some interpolation 
> to deal with sub-sample offsets, and then you have to output a sample 
> every x KHz.

With linear interpolation you can get away with just 32 precalculated 
phases. Without, 128 or 256. Some sram will be sacrificed but nothing 
excessive as other parts of VA synth don't need much sram.

> Whilst it isn't the most complex technique out there by a long way, it's 
> complicated enough to be impossible on a number of smaller chips than 
> can easily produce DCO reset pulses.

Obviously. You do however eliminate quite a few chips.
Anyone doing a commercial venture (as DSI is) should be capable of doing 
it (or they're in the wrong business). For hobbyists it's different case, 
but there are advantages to be had on that front too.

> I really hope you're right, Antti! My own experiments have lead me to be 
> more pessimistic about the dsPICs capabilities.

If the VLSI Solution VS10xx core can do 20+ voices at 36 MHz, dspic 
certainly ought to be able to do a few voices at the same speed :)

> If you've managed to shorten anything significantly, I'll be bugging you 
> to tell me how. If there's a better technique than I'm using, I *need* 
> to know about it!

Block processing, calculating modulations at block rate (1/16th) and using 
32 bit calculations only where absolutely necessary.

Antti

"No boom today. Boom tomorrow. There's always a boom tomorrow"
   -- Lt. Cmdr. Ivanova