[sdiy] DsPIC timer issue when used as DCO!

Tom Wiltshire tom at electricdruid.net
Thu Dec 10 11:51:38 CET 2009


This is very interesting. But I've done quite a bit of work building  
DCOs with the dsPIC timers, so perhaps it's just me.

Looking at the sound file linked to the discussion Karl posted:

http://www.mediafire.com/?uzonyy1dmml

This shows a square-wave LFO modulating one of the DCOs. The pitch  
glitch only seems to happen going up. Coming down is fine, as far as  
you can tell from this. We also need to think about how the triangle  
wave is generated. Is this a standard ramp-core DCO, followed by a  
triangle waveshaper, or is this a triangle-core DCO? (such a thing  
wouldn't be much more difficult). This matters because we need to  
know what we're seeing.

If anyone's got a P08 and could record a similar sample but with a  
ramp wave, that'd be very interesting for comparison. If it's a  
typical ramp core DCO, that'd give us the least hardware in  
operation, and might let us see the glitch more clearly.

On a separate note, I'm glad to see that even the mighty Dave Smith  
gets irritating bugs in his code (and I'm a massive fan of his work).  
When I work on stuff like this, I often find myself wondering how the  
hell the professionals get it so good. This reminds me that often  
they don't - it's just that you're far more critical of your own work  
than other people's, and you're better placed to find problems in  
something that you understand intimately.

T.


On 10 Dec 2009, at 06:02, Dave Manley wrote:
> How about another wild speculation: the PA397 is apparently a 3396  
> variant.  The frequency is set not only by the dsPIC sourced timer  
> that resets the timing cap, but also the input voltage (Vwf in the  
> 3396 datasheet) that controls the current source that charges the  
> cap.  Maybe the dsPIC is working perfectly but the control voltage  
> for the current source is sometimes messed up after a pitch  
> change.  It would be easy to look at the relationship between the  
> output frequency, the dsPIC output, and the Vwf control voltage  
> with a scope.  I remember looking at an image of the evolver when  
> it first came out, and it is easy to find the timing cap, etc.  If  
> I had one of the synths in this family I'd do the measurements.
>
> Looking at the linked waveform there's a couple of interesting  
> things - the change from low to high frequency doesn't happen at  
> the min/max value of the triangle but at about -25 (using the scale  
> in the image).  Is this because the multiplexed DAC outputs the new  
> Vwf, the current source charges the cap at the new rate, the  
> waveshaper quickly sweeps thru at the new frequency, and then the  
> timing cap doesn't get reset by the dsPIC.  It just sits there for  
> ~13ms.  Perhaps the dsPIC is taking an interrupt between setting  
> the new Vwf and updating the dsPIC timer. The 'deeeeeeeeelaaaaay'  
> is the length of the ISR?  I can't imagine any ISR would take that  
> huge amount of time though. Hmmm.
>
> Again would be very easy to check with a scope.
>
>
> -Dave
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