[sdiy] Tap Tempo LFO

[Eric Brombaugh]

I guess there's a lot of confusion about what 'satisfactory' means. 
Going back to the OP, the idea is to create a digital clock signal 
suitable for driving a 4k BBD at sufficiently high rates to provide 
delays short enough to do flange/chorus effects, and with resolution 
that would allow sweeping frequency without noticing discrete stepping.

General consensus seems to be that delays in the 1ms - 20ms will be 
needed, so by my estimation this means we'll need a clock signal with a 
maximum frequency of 4Mhz or so. To avoid noticeably discrete steps we 
should probably have resolution of at least 100 steps at the top of the 
range, so figure about 40kHz, or a delay increment of 10us in a 4k BBD.

Most microcontrollers have some sort of timer peripherals capable of 
generating frequencies by dividing the system clock down by integer 
values. Assuming an AVR or PIC clocked at 16 - 20MHz, we can get 4MHz by 
using a divisor of 4 or 5, but the resolution in this range will be very 
coarse - assume a 20MHz clock and you can get at best 667kHz resolution, 
which equates to a delay increment of 200us in a 4k BBD.

So for finer resolution in your delay you'll need a higher clock rate 
into the divider with a larger divisor, or some alternate way to 
generate the clock, such as a PLL, DDS, etc. There are few 
microcontrollers available that include these as on-chip peripherals, so 
some sort of external circuitry will be required. Note that a lot of 
modern microcontrollers have PLLs for generating the master clock - I 
suppose if you wanted to get really whacky you could program the main 
clock PLL on the fly to change the master clock rate of the CPU & timers 
in order to get more resolution. Seems somewhat fraught though.

Anyway - that was the basis of my original assertion.

Eric

On 12/09/2009 09:58 AM, Amos wrote:
> When you said "general purpose mcu" I thought "8051" of which there
> are several that could generate a satisfactory clock signal with very
> little external circuitry, I think.
>
> On 12/9/09, Eric Brombaugh<ebrombaugh1 at cox.net>  wrote:
>>
>> On Dec 9, 2009, at 5:18 AM, Antti Huovilainen wrote:
>>
>>> On Tue, 8 Dec 2009, Eric Brombaugh wrote:
>>>
>>>> Using a general-purpose MCU to create a clock for a BBD is probably out
>>>> of the question for most garden-variety processors. While a lot of them
>>>> have divider-based timing generators built-in, the high-frequency
>>>> resolution is probably not adequate to support decent timing&  frequency
>>>> control at the rates needed to clock a BBD.
>>>
>>> Here I disagree. A simple VCO is not that hard to do if you stick to V/Hz
>>> and disregard linearity. A PLL would also be dead simple to do, too.
>>>
>>> With the VCO you need to build a calibration table and/or adjust the
>>> frequency on the fly, but that's hardly rocket science.
>>
>> Perhaps I need to defend the statement above with a little more detail:
>>
>> * 'general purpose MCU' means an inexpensive processor with a normal
>> complement of peripherals like low-res ADCs, timers, GPIO, etc. Think a PIC
>> or AVR.
>>
>> * I thought the OP was talking about creating a BBD clock source without
>> using any other external components - that was my assumption in this first
>> paragraph. Further on I discussed the possibility of adding an external PLL
>> or programmable oscillator.
>>
>> So I believe we agree - with a simple external oscillator and minimal
>> control it would be possible to create a clock for a BBD using a cheap MCU.
>>
>> Eric
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