[sdiy] help with clicks on VCA

Magnus Danielson magnus at rubidium.dyndns.org
Mon Aug 17 21:41:55 CEST 2009


Antti Huovilainen wrote:
> On Mon, 17 Aug 2009, Magnus Danielson wrote:
> 
>> If you mean true slew-rate limit, then you can achieve that as long as 
>> the bandwidth is allowed to be reduced during the limit case, if not 
>> then you have problem.
> 
> Yes. I meant that the bandwidth should stay unaffected as long as 
> slewrate limit is not exceeded. Obviously when maximum slewrate is 
> exceeded, the "bandwidth" (not really meaningful as the circuit will 
> distort like hell) will be reduced.

Good, then we agree on it. I just wanted to make sure so we didn't 
disagree on basics before discussing specifics.

>> If you current-limit the output stage with a known capacitive load and 
>> with a feedback load, then you should be able to achieve this. If you
> 
> How does one do this without requiring matched transistor pairs or 
> similar components? I suppose OTA would be one way (Iabc is the maximum 
> current).

Doesn't really need a very well-matched transistor pair, the current 
limit derives from the common emitter current... so both sides see it 
equally well, but mis-matching shifts when it is achieved. The common 
emitter current should be well below saturation. A diff-pair should be 
the actualy input stage and then the current-limited variant the next 
stage for raw-gain... then sense with sufficiently high impedance (a 
couple of TL-071s could be used) and feedback to the input pair.

The cool thing with this approach is that since a current mirror is used 
for the current-limit pair... the slew-rate limit can be made under 
current control. This is similar but not equalent to an OTA. I'll think 
about wither an OTA could be used, should be possible. Essentially, the 
raw gain should be large so that the capacitive load is worked out in 
the non-current limit range.

Cheers,
Magnus



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