[sdiy] Digi-Mod schematic

[Seb Francis]

Eric Brombaugh wrote:
>
> I've got a bit of experience with dsPIC SPI ports... :)
>
> The dsPIC SPI port in master mode doesn't control the SS pin via 
> hardware (unlike SPI ports on other MCUs like ARMs, etc). You will 
> need to 'bit-bang' the CS pin for any slave devices you've got. Note 
> that a lot of SPI peripherals absolutely require an edge on their SS 
> inputs to signal the start/end of a bus transaction, so leaving this 
> signal out is generally not an option.
>
> For the most generic application, bring out the SS pin. If you're in 
> master mode it can be driven via GPIO as the CS pin to your slave 
> devices. If you're in slave mode you'll want it anyway.

Thank you Eric.  Now why can't they say anywhere in the datasheet / FRM 
that the pin is left as GPIO when in master mode!  I guess this means 
it's impossible to use DMA for SPI master mode where the slave device 
requires CS.


>
> * Just because you can't bring out the SS1 pin doesn't mean you have 
> to give up using SPI1 - you can't use it as a slave port, but with any 
> other GPIO pin as the /CS you can use it as a master port. 

Yes, I understand this now.  So for example any of the unused I2C/GPIO 
pins could be used for SS.  Still I guess it makes sense to give access 
to at least SS2 so the dsPIC could be a slave (for example if 2 Digi-Mod 
boards were connected together).

I also take your point that the SPI lines can be shared as long as there 
are sufficient extra GPIO pins to address each device (either directly 
or via a decoder).




>> Perhaps this is OTT for dsPIC ADCs, but I'd like to get the ADC 
>> inputs accurate enough for pitch CV so thought I'd try it.  I can 
>> also solder in a more basic buffer configuration and compare if it 
>> makes a difference.  On the final PCBs I may simplify this if it 
>> proves unnecessary.
>
> dsPIC ADC inputs are capable of handling V/Oct CVs for pitch control. 
> A good low-impedance drive without fancy topologies is generally 
> sufficient.
>

I will try both and see if it makes any noticeable difference to the ADC 
accuracy.  In terms of component count it actually doesn't make any 
difference though.

Looking at Figures 5 & 6 in this article:
http://www.audiodesignline.com/210605596?printableArticle=true
It would appear that the compensated buffer topology needs an extra 
resistor and capacitor, but actually if the buffer is being used as an 
inverting summer like it is in my case then a feedback resistor is 
required, and for stability also a feedback capacitor, thus giving 
exactly the same component count whichever topology is used.

Seb