[sdiy] Sampler mode...

[ASSI]

On Dienstag 18 November 2008, Seb Francis wrote:
> Well, from the point of view of the sample start point, a short
> attack phase would eliminate any clicking, but for looping points
> it is much more desirable to quantise to the zero-crossings as you
> suggest.

That requires advance knowledge of where the zero crossings are.

[...]
> In actual fact it would
> be better to search for the 'next' rather than 'nearest'
> zero-crossing otherwise it doubles the number of SRAM reads
> necessary.

I can't see this happening in your setup, you would probably need less 
read bandwidth and CPU cycles just reading two streams at the splice 
point and crossfade them.

> It's doable, but some hysteresis of the CV inputs would be
> important otherwise any ADC noise will burn lots of CPU time in
> looking for nearest zero-crossings when the CV didn't really
> change.

Then there's the insignificant problem of what should happen when you 
change the loop point while you are actually doing the splice...


Achim.
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