[sdiy] Sampler mode...

[Seb Francis]

> In my experience, the effective resolution of a pot is on the
> order of 350 positions so some form of quantisation will be
> needed.
>   

Well, from the point of view of the sample start point, a short attack 
phase would eliminate any clicking, but for looping points it is much 
more desirable to quantise to the zero-crossings as you suggest.

Quantising to the nearest zero-crossing has its challenges though: since 
the sample data is stored in external SRAM it means doing potentially 
quite a lot of SRAM reads to find the zero-crossing.  This will limit 
the rate at which the sample point can be changed, especially when you 
consider that start, end and loop start sample points can all be changed 
simultaneously.  In actual fact it would be better to search for the 
'next' rather than 'nearest' zero-crossing otherwise it doubles the 
number of SRAM reads necessary.

It's doable, but some hysteresis of the CV inputs would be important 
otherwise any ADC noise will burn lots of CPU time in looking for 
nearest zero-crossings when the CV didn't really change.

Regarding control resolution from a pot: remember nothing stops you 
using 2 pots - 1 coarse and 1 fine.  The ADCs are 12 bit, with I would 
think 10 or 11 bit accuracy above the noise floor.  So with a couple of 
stable pots that's at least 1024 positions.  Still going to benefit from 
quantising to zero-crossings though.

Seb