[sdiy] Digital oscillator problem

[Tom Wiltshire]

Hi All,

I've got a problem with my dual DWGS digital oscillator project. I  
wonder if anyone can offer any advice?

I've got 6 CV inputs, split between the two oscillators on the chip.  
The CVs are for Frequency, PWM/PD, and FM amount.

Everything works fine, math-wise. I've got frequencies coming out,  
and you can tweak the pulse width or phase distortion of the  
waveforms, and you can do FM from one osc to the other. That's all good.

The problem is noise coming in on the ADC channels. I then compound  
this problem by using those CVs in the most important parts of my  
algorithm, like the frequency increment calculation, and the FM  
maths. The FM maths is particularly bad since it multiplies the  
output of one oscillator up by a factor of four (increasing the  
jitter/noise by the same amount) to increase the FM depth. The FM  
waveforms look great, except you can see the noise on the scope and  
hear it too.

I've thought about trying to apply some digital filtering to the CV  
inputs, but I'm not sure how that would work. The ADC is running  
using a DMA channel in the background, so I don't know exactly how  
often it samples. My oscillators are producing samples at 50KHz.

The whole thing is currently lying on a breadboard on my bench, so  
it's probably as bad as it can be right now. Hopefully the problem  
would be less severe on a decent PCB. But if it weren't, what would  
you recommend?

Thanks,
Tom