[sdiy] Starting a Four Pole Filter in an FPGA.....
ASSI
Stromeko at nexgo.de
Sun Nov 2 09:17:27 CET 2008
On Sonntag 02 November 2008, Jim Patchell wrote:
> I am just now starting to implement the four pole filters that I am
> going to attempt to get into my FPGA based synth...
>
> I am still trying to figure out the pipe-lining...which is probably
> the most difficult part of the whole thing.
The difficult part is coming up with a suitable filter topology. I
guess you'll be doing bit-parallel integer arithmetic. Then it is
problematic to use biquads - they are going unstable at low cutoffs
(unless you put in extra precision) due to quantization errors.
State variable wacks out at high frequency depending on Q and
therefore requires oversampling. A few pointers:
http://www.earlevel.com/Digital%20Audio/index.html
http://www.musicdsp.org/archive.php?classid=3 (mostly FP code)
Other than that I'm afraid I won't be of much help, it simply has been
too many years since I've been doing real DSP myself...
Achim.
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