[sdiy] Capacitor sizes for Eagle

[John Luciani]

On Fri, May 23, 2008 at 3:35 AM, Aaron Lanterman
<lanterma at ece.gatech.edu> wrote:

> Are there some rules of thumb for about what sizes to allocate on the board
> for capacitors of various values?

For TH boards I try to place components on a 50mil grid (sometimes  25mil)
and route on a 25mil grid. I leave apx 25mils space between the bodies of
components.

Also when making component footprints I make the silkscreen body
outline the same
size as the maximum specs of the component body. When I do a 1:1 printout
I can see the exact placement. For TH boards I would recommend doing
1:1 printouts and placing the actual components on the paper for verification.

(* jcl *)

-- 
http://www.luciani.org