[sdiy] Shift register sequence period

[Dave Manley]

Tim Stinchcombe wrote:
> Hi list,

o_0

...much detailed work deleted...

> 
> In the original circuit, the other 4 states form a periodic sequence on
> their own:
> 
> 011001100110011001
> 110011001100110011
> 100110011001100110
> 001100110011001100
> 
> so both the all-1s and all-0s states are in the longer sequence. Even if we
> assume that it is equiprobable that any given stage in the register can be
> either a 0 or 1 at start-up, it is highly unlikely we'd get into this cycle,
> and I'm guessing they're more likely to be mostly 1s or mostly 0s, but not a
> mixture, so this makes this cycle even more unlikely. The length-19
> homogeneous equivalent presumably has other cycles that the shorter register
> cannot generate, because it does have more states, but I'm not interested in
> these anyway.
> 
> I also discovered the circuit turns up in quite a few places: Barry Klein's
> book mentions it, and says it's used in the Maplin 3800 & 5600, which must
> equate to the ETI 3800 & 5600, as it is in those too; also the ETI 4600; the
> Elektor Formant; plus the others I mentioned before. Which came first is
> anybody's guess.


I've got to hand it to you for having determination to get to the bottom 
of an issue!

For me, an interesting thing to learn is that for a given polynomial 
using xor feedback vs xnor feedback does not give the same length 
sequence.  I'm not much of a 'maths' guy, so perhaps this is obvious (it 
probably doesn't much work to prove this empirically).  My past 
experience has always been with maximal length sequences, and I'm going 
to boldly state with no backup, that for those sequences it doesn't 
matter whether the feedback is inverted or not.  Is that true?

It makes you wonder who designed this thing in the first place and if 
they knew what they were doing.  Was it intentionally designed to allow 
the all-1s and all-0s states?  The reset circuit is fairly unique 
because it doesn't really reset anything, as the power comes up, at some 
point an inversion is introduced.  That's a non-obvious reset, you might 
expect instead a reset that forces all-1s or all-0s into the shift input.

The other thing to note is the circuit has a spare xor - there's plenty 
of gates to implement a maximal length sequence.  Is that true in the 
older designs too?

Curious.

-Dave