[sdiy] linearizing a JFET used as voltage controlled resistor.
ASSI
Stromeko at nexgo.de
Sat May 3 00:42:23 CEST 2008
On Samstag 03 Mai 2008, Dave Manley wrote:
> > 1) The App note still beats around the bush with the principle of
> > the linearization. What it should just have plainly said is that
> > you need to add V_DS/2 onto V_GS for obtaining the largest dynamic
> > range. With this in mind you can sometimes find different ways to
> > linearize the JFET without mucking about with extra resistors.
>
> That is a simpler way of stating it.
Yes, it is so simple that some bozo clown in 2000 went to the patent
office, described much the same in more complicated words and the
examiners gave him US6,348,834 only two years later. Never mind
decades of prior art, numerous textbooks and obviousness...
Achim.
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