[sdiy] Mysterious transistor on one of the ASM-1 VCO versions

[Ken Stone]

The PNP should be very vexing - it's an NPN!

Ken

>OK, so I'm throwing yet a third oscillator at my student Greg. The  
>first two I threw at him were datasheet ones. I know people got the  
>AN-299 working, but Greg was getting frustrated, as was I, so I  
>figured I'd throw at him the ASM-1 VCO, which is one of the most  
>proven, often built, and best understood designs out there.
>
>There are two versions of the ASM-1:
>
>1996: http://home.swipnet.se/cfmd/synths/friends/stopp/asm1vco.new.pdf
>
>2003: http://home.swipnet.se/cfmd/synths/friends/stopp/asm1vco-1.1.pdf
>
>The main difference between the two is an NPN transistor at the output  
>of the LM311, which appears in the 2003 version but not the 1996  
>version.
>
>I reasonably understand the 1996 version - I even did a lecture on it,  
>or actually the version that appears in Hal Chamberlin's book.
>
>But this 2003 version with the PNP bewilders me. Alas, that's the one  
>I happened to send the link to Greg to build, and the PNP has been  
>vexing us today.
>
>He built the oscillator, but it appears the gate is stuck at around 0  
>V, so the JFET is conducting, and as we change the CV, we get a DC  
>change at the triangle output, but no actual oscillation. The level at  
>the + input of the comparitor is less than the 5 V threshold, so the  
>output of the comparator is at -15 V; my understanding of BJTs is that  
>the transistor at the output is then "off", so no current is flowing  
>through the collector, and the gate is more or less hooked to ground.  
>And then I'm confused what would happen if the LM311 turns "on" - as  
>an open collector output, it should disconnect the base, and then I'm  
>not sure what the BJT would do - would it set the gate to the -15  
>rail? And if so... isn't that BJT doing the opposite of what we want?  
>Like it's almost acting as a logic inverter on the LM311 output.
>
>I get more confused reading the ASM-1 webpage:
>
>"When output of the CA3140 goes above Vref, the comparator LM311 will  
>pull its output transistor collector (pin 7) to -15 V since its  
>emitter (pin 1) is hooked to
>-15V. This will bias the JFET (Q3) into conducting range and reset the  
>capacitor C2 through the Rds(ON) of the JFET."
>
>I though setting the gate to -15 V should pinch the JFET "off," not  
>put it into conducting range... this is suggested by p. 190 of  
>chamberlin, which says: "as ong as the integrator output is less than  
>Vref, the comparitor output is negative, which keeps the FET switch  
>across the integratind compacitor off, allowing it to charge. As soon  
>as the integrator voltage reaches Vref... The comparator output is  
>constrained to rise no further than ground but this is enough to fully  
>turn on the high-thrshold-voltage FET switch."
>
>So the ASM-1 webpage seems to say that -15 V at the gate does the  
>reset, and the Chamberlin book seems to say that 0 V at the gate does  
>the reset.
>
>*confused Aaron is confused*
>
>- Aaron
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_______________________________________________________________________
Ken Stone   sasami at hotkey.net.au
Modular Synth PCBs for sale <http://www.cgs.synth.net/>
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