[sdiy] modeling pitch and gate cv in spice

[harrybissell at wowway.com]

For the pitch, maybe 50K - 100K to simulate typical
input to VCOs

Envelope generators ~might~ be lower, I'd try testing those
at 10K

H^) harry




On Mon, 16 Jun 2008 12:38:26 -0500, Mark Rivera wrote
> I'm modeling an idea for an analog circuit - nothing fancy, just a 
> barebones 1V/oct pitch-and-gate sequencer. It uses a 74-4514 5V 
> outputs for feeding the gates, leds, and 3904/3906 pairs (the latter 
> channeling +15V to drive the pitches).
> 
> Should I place a resistor across the pitch and gate outputs to 
> simulate a load? What is an appropriate value?
> 
> thanks,
> Mark
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Harry Bissell & Nora Abdullah 4eva