[sdiy] Digital noise sources

[Magnus Danielson]

From: Dave Manley <dlmanley at sonic.net>
Subject: Re: [sdiy] Digital noise sources
Date: Fri, 13 Jun 2008 10:46:20 -0700
Message-ID: <4852B26C.3000205 at sonic.net>

> Tom Arnold wrote:
> > Something else I've been pondering.
> > I noticed in Tom Wiltshire's noise generator PIC that he preloads the shift
> > registers with some random data.  I'm curious about something though...  In
> > a "normal" logic based noise source, are we depending on the power-on state
> > of the shift register to be random, or are we just loading it from 0 with
> > the pattern generated from the XOR's?
> > 
> 
> For maximal length sequences:
> 
> If the feedback is XOR, the initial state can be anything except all 0.
> If the feedback is XNOR, the initial state can be anything except all 1.
> 
> A safe thing to do is to load a mixed value, since that will work with either feedback type.

Actually. Most designs uses XOR. When you don't have any other reasons, the
default is to initiate to all ones.

> In general it is not safe to assume that logic is going to power up in a certain state (FPGAs are one exception).  There should be explicit reset logic that loads a valid state, and if you are really paranoid, you can add logic that detects any *invalid* states and force the shift register into a valid state.

Never assume reset-state. Always use explicit reset. FPGAs loads known state,
but since you want to reset again, you do explicit reset there too. There are
flip-flops which does not require resets, since whatevet their initial state
was, it will be clocked out anyways. Shift registers belongs to this group.
Removing explicit reset may result in more optimal "fit" into FPGAs while not
being a major risc (you must be aware of first bit being random and await it's
shift-out, which you may do most of the times).

I don't think there is much added benefit by filling the state with random
numbers. If you have multiple generators, just don't use the same clock and
they will drift apart quick enought. A lowsy oscillator will add enought time
position noise to really make sure that they will not be very well correlated
to be annoying.

If you dig in the archives I provided hints on how to design very long PRBS
generators with a handfull of standard CMOS chips. You can create dense and
high frequency noise that way.

Cheers,
Magnus