[sdiy] Idea for DCO

[John Mahoney]

Seeing DAC and VCO in the same context makes me think of Paul 
Schreiber's posts on DAC accuracy, with respect to MIDI-to-CV 
conversion (you can search the archives) -- his point being that it's 
difficult (expensive) to get sufficient resolution. I assume (uh oh!) 
that a DAC in a DCO would  require similar accuracy.

Your post also reminds me of a weird idea that I've had: a continuous 
auto-tune facility. The microprocessor would know which MIDI note 
number the VCO was supposed to be playing; it would also monitor the 
output of the VCO. By comparing the actual pitch to the target pitch, 
it would make adjustments every so often. In order to keep the pitch 
from jumping around too much, it would need to do averaging and 
smoothing; actually, it could just wait for "note off" events to 
adjust the tuning tables! Adding to the complexity, the computer 
would also have to know how much pitch offset (octave, pitch bend, 
intentional detuning) was in effect, so this is really something for 
a programmable analog synth (as opposed to a modular) because a 
digitally-controlled analog synth's brain is aware of all that stuff. 
Just thought I'd throw that into the discussion!

John


At 08:18 PM 7/11/2008, Stewart Pye wrote:
>Hi,
>
>I've been thinking about attempting to build a VCO that has the 
>integrator capacitor reset by a microcontroller. For now lets assume 
>the VCO design is similar to the ASM1. It would still have the expo 
>converter, but it could be built using standard (cheap) transistors 
>and no tempco resistor. The expo converter is just there to charge 
>the integrator capacitor. The comparator would be omitted as the 
>discharge FET would be triggered by the microcontroller. The linear 
>CV would go into a 16 bit DAC and the micro would calculate time 
>period required for the reset pulse.
>
>There would be a timer interrupt keeping track of the capacitor 
>reset timing. In the background you sample the ADC, convert it to 
>the value needed to be loaded into the count register and keep 
>storing the value until it's time to reset the VCO. When it is time 
>to reset the VCO you take the timer reload value of the last sample 
>and put that into the count register. So the next cycle will have 
>its period determined by the last ADC sample taken.
>
>Has anybody tried something like this before? Am I missing any 
>obvious flaws in this scheme.
>
>Regards,
>Stewart.