[sdiy] Idea for DCO

[Jim Patchell]

Well, it would certainly be interesting to try...  The one problem with 
using a timer interrupt is phase jitter.  Most micros execute 
instructions in a variable number of clock cycles...which are generally 
atomic with respect to interrupts.  So the exact number of clocks 
between any two interrupts could vary a bit...(on average, however, it 
will be exact).  You can see this by just putting a scope on the 
interrupt line (if it is probe-able).

-Jim

Stewart Pye wrote:
> Hi,
> 
> I've been thinking about attempting to build a VCO that has the 
> integrator capacitor reset by a microcontroller. For now lets assume the 
> VCO design is similar to the ASM1. It would still have the expo 
> converter, but it could be built using standard (cheap) transistors and 
> no tempco resistor. The expo converter is just there to charge the 
> integrator capacitor. The comparator would be omitted as the discharge 
> FET would be triggered by the microcontroller. The linear CV would go 
> into a 16 bit DAC and the micro would calculate time period required for 
> the reset pulse.
> 
> There would be a timer interrupt keeping track of the capacitor reset 
> timing. In the background you sample the ADC, convert it to the value 
> needed to be loaded into the count register and keep storing the value 
> until it's time to reset the VCO. When it is time to reset the VCO you 
> take the timer reload value of the last sample and put that into the 
> count register. So the next cycle will have its period determined by the 
> last ADC sample taken.
> 
> Has anybody tried something like this before? Am I missing any obvious 
> flaws in this scheme.
> 
> Regards,
> Stewart.
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