[sdiy] Inifinity encoders
Csaba Zvekan
czvekan at gmail.com
Fri Jul 11 17:06:21 CEST 2008
Wonderful ! I was just able to test the circuit it cost me 1.80$ for
two 74HC165 :) . First the 8-bit parallel data gets clocked out and
while you clock this out serial data gets clocked in so you can just
clock another 8-bits serial data out. It's that simple , awesome.
I am experimenting to have this routine in an interrupt so when bit-
status changes .The two registers will be updated and available to the
main program for further evaluation and processing.
Again thanks. This is a very quick,cheap and dirty solution , so
simply and great ! :)
Csaba
On Jul 9, 2008, at 7:11 PM, Manuel Odendahl wrote:
> Hi!
>
> On Jul 9, 2008, at 5:29 PM, Csaba Zvekan wrote:
>>> I was referring to Manuels Schematic. Now looking at some
>>> interesting designs from µCAapps.de .
>>>
>>> On Jul 9, 2008, at 4:42 PM, Samppa Tolvanen wrote:
>>>
>>>> and 74HC165 datasheet. Pin 1 /PL is brought low to "sample" state
>>>> of
>>>> parallel input bits and then high (values are now on shift
>>>> register).
>>>> Now these can be shifted out with clock signal. Pin 10 Ds is for
>>>> cascading and must be terminated at the end of the chain.
>>>
>>> In Manuels case I bring SH low (sample State)then high then clock
>>> sixteen times the data in .I assume IC5 H first and IC1 A last ?
>>> I thing I'll brew something together ... I like this :)
>
> Exactly. Don't remember which is first and which is last, but you'll
> figure it out :) The caps are for debouncing.
>
> Cheers, Manuel
>>>
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