[sdiy] dsPIC with on-chip audio DACs

Eric Brombaugh ebrombaugh1 at cox.net
Sat Jul 5 22:26:53 CEST 2008


On Jul 5, 2008, at 9:04 AM, Antti Huovilainen wrote:

> On Sat, 5 Jul 2008, Eric Brombaugh wrote:
>
>> My current project is running the system at near maximum CPU and  
>> DAC rates (40MIPS, 100kHz) and even a fairly simple NCO takes about  
>> 15-20% of the processor bandwidth.
>
> Out of curiosity, what exactly are you doing in it?

This is just an evaluation project to see how hard I can push the  
processor. As mentioned, I'm running the CPU near it's maximum 40MIPS  
and the DACs near their maximum 100ksps. The foreground task computes  
exponential frequencies from one of the ADC inputs and drives a batch  
of LEDs. One of the background tasks integrates 16 samples of ADC  
input on each of 6 channels. Another background task updates a 32-bit  
NCO and does two sine lookups for a quadrature output.

I could probably tighten up the code somewhat, and removing some of  
the debug/diagnostic support might free up some additional bandwidth,  
but I think that the 100ksps sample rate is probably the major driver  
on the CPU bandwidth in this case.

> The cpu horsepower should allow (assuming the core instruction set  
> is up to the task) one or two voice wavetable synth with antialiased  
> oscillators and analog modelled filter (at 48 kHz).

I've done a pair of interpolated wavetable oscillators on the older  
series dsPICs running at ~70kHz (they top out at 30MIPS) which used  
most of the available horsepower. I didn't use any of the fancy BLIT  
techniques you described in your IEEE paper though. Filtering wasn't  
on the requirements, but would probably have been a bit too much for  
the older parts, although simple 2nd-order IIRs might work on the  
newer one if you kept the sample rates low and didn't try to squeeze  
too many other goodies in.

> A couple of years ago I did work (only algorithm and instrument  
> design, not actual code) on a similarly specced DSP that allowed  
> roughly 10-15 simultaneous voices with antialiased oscillators and  
> MS-20-ish filter.

Sounds challenging! If one kept the sample rate low and the oscillator  
specs fairly loose, I would imagine you could achieve something  
similar with this part.

> If the ADCs can be used for audio (at say 2x oversampling), a fairly  
> nifty multifx processor should be possible too (phaser, flanger,  
> chorus, shortish delay etc).

The ADC can be used at audio rates, but is only accurate to about 10  
bits (even in 12- bit mode), so it's a bit on the noisy side for  
effects. As mentioned elsewhere, they do include an I2S codec  
interface in the complement of peripherals available on-chip though,  
so good quality audio ADC is not too tough to do.

Eric




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