[sdiy] OT: COSMAC Elf 2000

[Roy J. Tellason]

On Saturday 02 February 2008 22:43, Phillip Harbison wrote:
> Roy J. Tellason wrote:
> > But they'll also handle 15V logic levels just fine,
> > which is something that none of the newer series parts
> > will do AFAIK.
>
> The 74ACT, 74FCT, and 74HCT series will only handle +5V.
> I thought the 74AC, 74FC, and 74HC would handle +15V but
> I may be wrong. You definitely give up TTL-compatiblity
> with the latter.

I haven't really looked,  but I'm not aware of any of those 74xxx families 
that operate on anything other than +5,  excepting some lower-voltage parts.

> > Still a whole different chip though.  :-)
>
> They had more in common than most peecee fans wanted to
> admit. Electrically, they're largely similar except for
> operating frequencies which were higher for the 8088. I
> think both used an active low /RD (read) or /WR (write)
> to indicate memory cycle. Not sure about the ready/wait
> signal.
>
> > And I don't like 'em much.  Segment registers?  Ugh!
>
> I never cared for the 80x86 family either (preferring the
> 6809 and 68K); however, if you set those segment registers
> to zero, you can ignore them for the most part and still
> have the full 64K address space supported by S-100. If
> you want to address 1MB, then unfortunately your next
> destination is segment register city.

I never did much with the 6809,  or any of the 68xx parts for that matter,  
and perhaps might get around to rectifying that someday.  The 68K is one I'd 
like to play with some,  it reminds me in some respects of the PDP-11 with 
all that orthagonality in the instruction set.  The bus interfacing seems to 
be a whole lot more complicated,  though.

> The x386 took a similar strategy to end complaints about
> the segment registers. They expanded the displacement to
> 32-bit (i.e. 4GB segments) so everyone just ignored the
> segment registers for the most part. However, you still
> paid a penalty for their existence, especially if you
> wanted to do memory management (write-protection was a
> segment-level rather than page-level feature, go figure).
>
> As a computer architecture purist, it is easy for me to
> get disgusted at the amount of bondo and duct tape that
> has been grafted onto an already deficient architecture
> over the years. I just have to remind myself that the
> superscalar x86 processors are a bit like the Russian
> dancing bears. The miracle is not how well they dance
> but that they dance at all.

Indeed.  Some stuff that's out there is fairly simple and elegant.  Often 
there's a lot of symmetry to the way things are set up.  Other parts,  and I 
apply this to pretty much everything intel has come out with in terms of LSI 
and all similar related families,  are byzantine -- write-only registers?  
Way too many config options that don't seem to make a consistent patter and 
all of which seem to be there more for the convenience of the chip designer 
than as something that the end user would *really* want.  Which in the case 
of some of the peripheral chips doesn't necessarily stop me from using them 
entirely,  but...

> > That bus also supported the 68000 (Cromemco) and
> > probably a bunch of other chips besides.
>
> For that you needed what was called a "Motel" circuit.
> The 68K had RW (read/not-write) and /DS (data strobe)
> signals. The equations to generate /RD and /WR were
> as simple as:
>    /RD = ~ (DS & RW)
>    /WR = ~ (DS & ~RW)
>
> So you needed two inverters (for /DS and RW) and two
> 2-input NAND gates. The Motel circuit for the 6502 and
> 680x was similar but used CLK instead of /DS.

Sounds simple enough.  It's been a really long time since I looked at any of 
those details,  though.

> > Yup.  It's also speed-limited.
>
> Somewhere I have an S-100 bus with active terminators.
> I think it was made by Tarbell or Cromemco. This solved
> a lot of noise problems and allowed it to run faster.

I remember reading claims somewhere that the speed was limited pretty much to 
10 MHz by the design of the bus.  Which isn't that big of a deal for me 
anyhow,  as I'd have all the higher-speed stuff on one card,  mostly.  No 
reason I can see to not have the memory on the same card as the CPU,  and the 
boot roms or whatever as well.  Stuff's plenty small enough these days to do 
that within the S-100 form factor without any real problems,  except for 
maybe some difficulty in using the typical prototypiing boards.  :-)

I have a smallish (6-slot?) backplane board,  made by Vector,  and that's 
similarly equipped.  I started wiring it up,  adding all sorts of parts to 
it,  and stopped when I didn't have (at that time) the required 33uF 
capacitors.  I also never did get around to getting the actual S-100 
connectors to put into it.  One of these days maybe I will.  :-)

I also have a couple of machines that use that bus,  an Imsai 8080 and a 
Cromemco System 3 that has drive problems,  but don't see either of those as 
being test/experiment platforms really.  And a prototyping card or two...

> > If I were building anything for either box I'd put the RAM and CPU on the
> > same board, [...] and let the I/O sit somewhere else if I had to...
>
> Actually, there's very little need for the S-100 bus or expansion cards
> unless you want to put synthesizer circuitry on the cards. You can get just
> about all the RAM and I/O you need on one S-100-sized card.

That's about what I figured.

> I build my first UNIX computer in 1984 using Multibus cards (similar to
> S-100 size) and the entire computer logic (68K, MMU, 1MB RAM, boot PROM,
> SCSI, and serial ports) fit on one card. Initially it only used the Multibus
> to get power. I personally don't care much for bus specs that use edge
> connectors (preferring the DIN connectors used in VME and NuBus) but I have
> to admit I got a lot of work done with that first little UNIX box.

Sounds like a lot of fun though 1MB isn't going to be considered much these 
days.  I've never messed with either multibus or VME,  and neither one has 
particularly struck me as being all that friendly to the sort of prototyping 
I'd be likely to get into,  wire-wrapping and such.

> > Though my interests aren't necessarily limited to synth-type stuff.
>
> Neither are mine. Someday I would like to design and build a simple computer
> using nothing but NAND gates just to demonstrate it can be done. I just
> doubt that anyone on synth-diy would care much about it or want to use it to
> make music. :-) 

For "things that don't quite fit in..." feel free to stop by here:

http://groups.yahoo.com/group/roys-tech-chat/

where this stuff we're kicking around would probably be better off.

> > You're working on something that has 2048 processors?
>
> I'm designing a massively-parallel processor based on the Freescale 8641D
> (essentially a dual-core G4 with interesting on-chip peripherals). The
> building block is a blade with quad 8641Ds and a switch chip. In the
> max configuration, which we call a hyper-cluster, it will have 2048
> processors (4096 G4 cores) which adds up to a boat load of "blinkenlights".

I'll say!

> If you're familiar with Beowulf clusters and similar architectures,

Yup,  I just never envisioned any particular use for them myself...

> my system is similar but the hardware is purpose-built. I probably should
> not say too much more about it without an NDA in place, and I doubt
> that anyone else on synth-diy is interested anyway.

Well,  it sure sounds nifty,  anyhow.  :-)

-- 
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