[sdiy] Digital oscillators [was: Active VCO temp compensation]

[Tom Wiltshire]

On 23 Dec 2008, at 22:30, Seb Francis wrote:

> Antti Huovilainen wrote:
>>
>> 5b) BandLimited StEps (BLEP)
>> For each oscillator reset, sum a bandlimited step with the trivial  
>> saw. The steps are precalculated and stored in a table (can be  
>> quite short when interpolation is used between two phases.
>>
>> Pros: Very good quality. No oversampling required. Can do  
>> bandlimited FM, PWM and sync. Probably the only method that can do  
>> audio rate PWM and sync.
>> Cons: Requires a divide per cycle. Can be complicated: calculating  
>> required table entry is not trivial when using sync or pwm.
>>
>
> For anyone trying to get their head around this (like me!), here's  
> an easily-understandable introduction...
> http://www.slack.net/~ant/bl-synth/
>
> Seb

This is a very clear walkthrough of the technique. One thing I did  
notice, though, is that on section 11 (http://www.slack.net/~ant/bl- 
synth/11.implementation.html) where they talk about storing different  
versions of the bandlimited step according to the subsample offset,  
what they're really talking about is oversampling the waveform.
E.g. It'd probably be neater to just store one heavily oversampled  
bandlimited step, rather than have a whole array of separate tables  
for different subsample offsets like they suggest. It amounts to the  
same thing, anyway.

Just a thought.

Regards,
Tom