[sdiy] Digital oscillators [was: Active VCO temp compensation]

Scott Gravenhorst music.maker at gte.net
Mon Dec 22 16:10:56 CET 2008


Seb Francis <seb at burnit.co.uk> wrote:
>Tom Wiltshire wrote:
>>
>>
>> I've tried going the whole hog, but I have to say that I'm not yet 
>> entirely convinced by my wavetable oscillators. To really remove the 
>> aliasing completely is difficult and finishes up using up so many 
>> processor cycles that you can't do any of the interesting stuff.
>
>I'm curious, what approach are you using to get 'alias free' 
>oscillators?  Simply using a much higher internal sampling rate and then 
>a low pass FIR filter?  Or something more sophisticated than this.  
>Which is the part that is burning most of the processor cycles?

Ah - alias artifacts, one of my favorite subject.

Alias free - in quotes, that's quite appropriate because it is mathematically
impossible to remove all alias artifacts from a signal which is made up of an infinite
series of sinewave harmonics.  Whether you can hear them is what is important.  The
techniques that can be used produce various amounts of alias artifacts, I've tried a
_few_.  

[A] In terms of simplicity, a very high sample rate can give good results.  My GateMan
monosynths all run at 1.0 MHz sample rate.  Amplitudes of harmonics of audible tones
are very weak above 500 KHz.  While I've never noticed alias artifacts in these
synths, they are there, moreso for higher pitches, but music tends to limit pitches
well below the top of the hearing range anyway.  

[B] I've experimented with band limited wave tables also.  The experiment was with
just one table.  This method produces no alias artifacts because they were never
generated in the first place.  Such a signal is composed of, in fact, a _finite_
series of sinewave harmonics.  So this is sort of cheating.  Because my experiment
used only one table which was generated to deal with the highest pitch the synth could
play, all notes played are alias artifact free - the downside is that lower tones
become more and more lackluster as pitch is lowered.  Multiple tables can be used for
different ranges of pitch to deal with this.  More tables means more complexity and
more RAM usage.

[C] Recently, I experimented with a technique which includes generating arbitrary
shaped waveforms naively at a sample rate many times higher than the DAC rate.  The
signal is passed through a brickwall filter, FIR in my case, and then decimated to put
the pitch in the correct range.  My FIR filter had 511 taps.  Alias artifacts were
inaudible (to my ears) up to fundamentals of about 5 KHz.  Near the end of the range,
I noticed some small inconsistency in output amplitude as frequency is changed.

There are still several other methods I've not played with yet.

As for performance - this kind of thing is where I think an FPGA shines, it's not
necessarily a matter of CPU cycles needed to tame the artifact beast, rather, one can
use the parallelism of an FPGA to an advantage.  For example, the high sample rate
then FIR then decimate method could be used in a one-sample-behind arrangement like
this: For each DAC enable, generate a set of samples (at a rate higher than the DAC's)
and store them in RAM.  Then next DAC enable, start the generation process again in a
second RAM, but now the last sample set created is available to the FIR filter which
decimates and ultimately sends it's output to the DAC.  Thus while the "now" sample is
being generated, the "old" sample is actually playing.  So for an FPGA, one can deal
with either cycles used by a processor doing a sort of linear processing thing OR one
can do both the generation and filtration in parallel.  In the former case, a high CPU
clock rate is necessary, in the latter, FPGA fabric area being larger is required. 
Fortunately, modern FPGAs are available in sizes well large enough to accomodate this
for audio synthesis - even with reasonably large polyphony.

---------------------------------------------------------------------------------
Aaron Lanterman has at least one video (sorry, I don't have the URL) in which he
explains how BLIT (Band Limited Impulse Train) works, very interesting.  

I recently found a PDF on the subject of BLOO (Band Limited Overlapping Oscillator)
http://s1gnals.blogspot.com/2008/12/bloo_6897.html where you can get the article and
source code for this.  I do not claim to understand this at this time.

-- ScottG
________________________________________________________________________
-- Scott Gravenhorst
-- FPGA MIDI Synthesizer Information: home1.gte.net/res0658s/FPGA_synth/
-- FatMan: home1.gte.net/res0658s/fatman/
-- NonFatMan: home1.gte.net/res0658s/electronics/
-- When the going gets tough, the tough use the command line.




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