[sdiy] DCO ramp core / capacitor discharge transistors

[Simon Brouwer]

Dave Manley schreef:
> Tom Wiltshire wrote:
>
>>
>> Can anyone tell me why we need to use a FET for the VCO, if the DCO 
>> can get by with a NPN?
>
> I can't name them off the top of my head, but there are VCO designs 
> that use an NPN transistor instead of a FET for the timing cap reset.  
> I might have time to dig through some schematics tonight...
It seems to depend on whether the VCO core uses an opamp integrator 
where one side of the capacitor is a virtual ground, for example ASM-2, 
or whether it doesn't, in which case the bottom of the timing capacitor 
is connected to a solid ground or supply voltage, and the expo converter 
output is at the live side of the capacitor, for example Oberheim SEM, 
Elektor Formant, Minimoog, ...

With the opamp integrator based VCO you tend to see a FET, in the other 
case often a BJT is used.

I assume it has to do with the base current into the BJT, which can 
harmlessly flow into ground or supply rail in the second type of VCO, 
whereas in the first type the integrator opamp would have to deal with 
it. I'm guessing that, once the capacitor is fully discharged but with a 
duration of the reset pulse slightly longer than absolutely necessary, 
the opamp, trying to keep its inverting input at ground potential, will 
proceed to pull its output negative instead of remaining at 0V.
Using a FET you don't  have this problem because it can be switched on 
without a current flowing from its gate into its source or drain.

As the DCO in the JX8P uses an opamp integrator and an NPN transistor, 
apparently it is possible to make a decent sawtooth with this 
combination. However, note the diode at the output of the opamp. What do 
you think it might be for ;)

-- 
Vriendelijke groet, 
Simon Brouwer. 

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