[sdiy] Digital 4 pole filter in an FPGA

[ASSI]

On Tuesday 09 December 2008, Jim Patchell wrote:
> Hope y'all aren't getting tired of these progress reports.

Not at all, just keep going. :-)

[...]
> Now, also to give you an idea of exactly what I am doing, this is
> basically the same kind of filter you would make with an
> SSM2040...without, unfortunately, the non-linear distortion that is
> inherent in the SSM2040.  I am not sure if I will be able to add a
> non-linearity in the filter loop or not.  That may be some future
> experiment.

If you haven't used up all BRAM resources you could pipeline through a 
LUT set up in block RAM (you will likely need to do some 
interpolation to keep the precision).  Using an LUT would have the 
added benefit that you could try out tanh distortion just as well as 
completely arbitrary waveshaping.


Achim.
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