[sdiy] Clock signal detector

[Needham, Alan]

Dave, Sorry, I don't agree- 250ms should be no problem for an RC
network!
I think it is common practice to double this time window for this kind
of application but not compulsory.

http://www.tpub.com/neets/book2/3d.htm

So 300ms could be achieved with a 1Meg resistor and a 300nF capacitor.
The actual resistance would need to be tweaked to suit the Schmitt
threshold and its load (assuming they are CMOS).

  |\    D1                |\
--| >--|>|--+------+------| >---
  |/        |      |      |/
            = C1   [] R1
            |      |
           Gnd    Gnd

2 Schmitt triggers, 1 diode (1N4148 or 1N914), 1 cap (about 300nF) and 1
resistor (about 1 Meg)
	Scott's idea, Dave's implementation, can't get simpler!

		Alan

-----Original Message-----
From: synth-diy-bounces at dropmix.xs4all.nl
[mailto:synth-diy-bounces at dropmix.xs4all.nl] On Behalf Of Dave Manley
Sent: 25 August 2008 21:17
To: synth-diy at dropmix. xs4all. nl
Subject: Re: [sdiy] Clock signal detector

--snip--
I asked the detection timing only because the proposed diode/RC will 
need a really low R if he needs a quick off detection - so low it will 
probably overload the driver.  If he can wait 5 or 10 seconds the answer

is different.
--snip--

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