[sdiy] Clock signal detector

[Dave Manley]

You just need a CLA: clock look-ahead detector, a simple variation on 
the carry look-ahead adder. I heard it was documented in a chapter of 
The Art of Electronics, but got lost in editing. :-)

I asked the detection timing only because the proposed diode/RC will 
need a really low R if he needs a quick off detection - so low it will 
probably overload the driver.  If he can wait 5 or 10 seconds the answer 
is different.

-Dave

harrybissell at wowway.com wrote:
> It would easily be possible to take the first clock edge as the
> start of a 'clock'... but you could not know that the clock had gone away
> until after the first missing clock oulse (250ms later).
> 
> Even a processor cannot exceed those limits, unless it has a web connection
> to 'psychic friends network'.
> 
> If you ~can~ do better let me know, as I want to incorporate the
> technology in my P/V converter experiments  :^P
> 
> H^) harry
> 
> 
> On Mon, 25 Aug 2008 10:14:40 -0700, Dave Manley wrote
>> Dave Manley wrote:
>>>> I want to make a simple circuit to detect when a clock signal is 
>>>> present. The clock line is either at 0v or a pulse of about 15% duty 
>>>> cycle and around 4 hz. I want a control output of 1 for clock present 
>>>> and 0 for no clock present. How is this done? It would be great if I 
>>>> could do it with 3 or 4 schmitt triggers and/or 1/4 of a 4016 analogue 
>>>> switch as that is what I have left...!
>>> Try using a series diode, to a resistor and cap to ground.  When the 
>>> signal is high it charges the cap, when low the resistor drains the cap. 
>>>  Choose the R to drain the cap if the clock stops for a few ticks.  Put 
>>> a schmitt before and after.
>> The unasked question here - how fast do you need it to respond?  
>> When the clock stops how soon does the control output need to go 
>> low? Likewise, when the clock starts how soon does the control output 
>> need to go high?
>>