[sdiy] Clock signal detector

[harrybissell at wowway.com]

It would easily be possible to take the first clock edge as the
start of a 'clock'... but you could not know that the clock had gone away
until after the first missing clock oulse (250ms later).

Even a processor cannot exceed those limits, unless it has a web connection
to 'psychic friends network'.

If you ~can~ do better let me know, as I want to incorporate the
technology in my P/V converter experiments  :^P

H^) harry


On Mon, 25 Aug 2008 10:14:40 -0700, Dave Manley wrote
> Dave Manley wrote:
> > 
> >>
> >> I want to make a simple circuit to detect when a clock signal is 
> >> present. The clock line is either at 0v or a pulse of about 15% duty 
> >> cycle and around 4 hz. I want a control output of 1 for clock present 
> >> and 0 for no clock present. How is this done? It would be great if I 
> >> could do it with 3 or 4 schmitt triggers and/or 1/4 of a 4016 analogue 
> >> switch as that is what I have left...!
> > 
> > Try using a series diode, to a resistor and cap to ground.  When the 
> > signal is high it charges the cap, when low the resistor drains the cap. 
> >  Choose the R to drain the cap if the clock stops for a few ticks.  Put 
> > a schmitt before and after.
> 
> The unasked question here - how fast do you need it to respond?  
> When the clock stops how soon does the control output need to go 
> low? Likewise, when the clock stops how soon does the control output 
> need to go high?
> 
> -Dave
> 
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Harry Bissell & Nora Abdullah 4eva