[sdiy] DC offset removal help
harrybissell at wowway.com
harrybissell at wowway.com
Wed Aug 13 16:29:43 CEST 2008
If you substitute Q2 (2N3904) with an NMOS transistor (such as a VN1206)
and use the shottky diode, you can do even better
With the shottly alone, simulation says about 78mV residual...
the NMOS transistor takes that down to 24mV
H^) harry
On Wed, 13 Aug 2008 08:38:17 -0500, harrybissell wrote
> Looks to me like if you replace D5 and D8 with 1N5819 Shottky
> diodes, the problem will be pretty much gone. The lower drop should
> remove most of the offset and get you much closer to the rail.
>
> Its not perfect. Perfect would probably use an analog switch so that
> there is essentially NO voltage drop (just a tiny teeny time error).
>
> H^) harry
>
> On Tue, 12 Aug 2008 20:54:57 +0100, Tim Stinchcombe wrote
> > > It's the old EFM Dual ADSR...running off of a 556. I don't
> > > know if there are schematics online. But like I said, there
> > > is essentially a .2 V offset right after gate, and it
> > > eventually settles to .1 V.
> >
> > If the schematic I have for that is the one you have, then I think
> > that the residual 100mV is the collector-emitter saturation voltage
> > of Q2, which is hard on with no gate applied (the main cap
> > discharges through the release pot, a diode and then Q2). Thus if
> > you could find a nifty way of lowering Q2 emitter, wthout upsetting
> > the gating action, then that would probably solve it - I actually
> > have a simulation of that circuit from years ago for another problem,
> > but at the moment I'm fresh out of 'simple' ideas that might work
> > (brain addled from a long day...)
> >
> > Tim
> > __________________________________________________________
> > Tim Stinchcombe
> >
> > Cheltenham, Glos, UK
> > email: tim102 at tstinchcombe.freeserve.co.uk
> > www.timstinchcombe.co.uk
> >
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> Harry Bissell & Nora Abdullah 4eva
>
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