[sdiy] Function Generator ICs

ASSI Stromeko at compuserve.de
Fri Sep 21 21:46:02 CEST 2007

On Freitag 21 September 2007, Scott Gravenhorst wrote:
> BTW, I don't totally
> understand the "gate count" thing, I have the "500K gate" Spartan-3E
> (XC3S500E), oddly though, in my polysynth design, the ISE says the
> design represents 1,290,000 "equivalent" gates...

The gate counts don't really tell you anything useful unless you are 
comparing them across the same set of tools.  In theory they should 
give you an idea how costly it would be to implement your design as an 
ASIC.  These numbers have been going through various iterations of 
marketing fudge factors with each generation of the FPGA architecture 
(not just at Xilinx).  A system gate is supposed to be equivalent to 
the sea-of-gates available in some mask programmed gate arrays.  System 
gates are usually traded at around 2..4 equivalent logic gates as they 
are typically three or four input (configurable) logic functions.  
Equivalent logic gates relate to the area used up in an ASIC 
implementation and normally equate a 2-input NOR dimensioned for 
fanout=4.  The "system gates" number quoted in the data sheet assumes 
that a certain percentage (I think 20%) of the CLB resources is used as 
distributed memory, with the memory roughly counted 5 times as complex 
as the combinatorial stuff.  If your design uses many CLB memory 
resources, ISE might even quote you more "equivalent gates" than the 
data sheet.  Also ISE is almost certainly telling you a "logic gates" 
rather than a "system gates" number, although that might be 

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