[sdiy] ceramic capacitor voltage rating

[ASSI]

On Sonntag 25 November 2007, Daniel Kruszyna wrote:
> I've heard the rule of thumb to use twice the expected
> voltage rating for decoupling capacitors, but am
> wondering how necessary it is.

All dielectrics will eventually fail, the electrical field determines 
how fast and how much margin you'll have for short-duration overstress.  
The half-the-rated-voltage rule is not something I would use on all 
electrolytics applications, but it provides a nice safety buffer for 
all kinds of overstress and aging conditions and hence is still widely 
used.  It does come at a price and at least partly comes from a time 
where the quality of the dielectric was poorly controlled and rated 
voltage was a questionable quantity.  That's not counting counterfeit 
capacitors...

> Particularly, I'm working 
> on a fairly dense surface mount pcb and the voltage
> rating determines the minimum package size I can use.

These are multilayer ceramics and it should be possible to use them much 
closer to rated voltage.  You should be aware that breakdowns in these 
capacitors are catastrophic and that they are rather ESD sensitive 
(compared to other passive devices).

> Should it be okay to use less of a margin than x2?

If you can keep overvoltage, temperature and ripple current in check, 
yes.  Post-regulator this should be no problem at all if you know what 
the ripple is.  If you regulate +-10% you may even get away with no 
margin to the +10% voltage condition, although typically you'll still 
provide 20% margin to nominal voltage.  If size determines routing, I'd 
rather have a smaller capacitor very close to the IC than a bigger one 
that is farther away.  Pre-regulator you'll probably still want 
electrolytics or ultracaps ofr their higher capacity.


Achim.
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