[sdiy] IC Prototyping was: SSM2040

[Tom Corbitt]

At my last job, the last step in our design process was rolling custom
ASIC chips of proven designs.  We looked at Array Design, but ended up
going with XFAB (we already had the equipment in house to dice, bond
and packaging the wafers)

XFAB is cheap (and by cheap I'm saying $10k+ a wafer) because they
already have the litho for all the parts they offer, you just tell
them I want the your #3 trench mosfet here and then a #12 cap here and
so on.

We had a client that used the ca3080 and when it went end of life we
enquired about getting the masks but discovered the big problem was
going to be finding a foundry that could still run the size and be
cost effective. The ones that could do it weren't set up to handle the
volumes needed to drive the price down to the point that it was cost
effective. (add that doesn't even take into account the
bonding/packaging costs that you have to add in on top of it all)

I doubt you'd ever get a xfab chip price per unit under $200, thats
not what they're model is designed for. You prove the design, then
send it out to a fab that runs 10k wafers; it's all a volume game. You
might be able to glob top to keep costs down on smaller runs, but
that's another process that adds qualitity control steps and reduces
yield.

Doing an xray or acid peel and slice reverse of any of those old chips
only gets you half way there, you'd still need to take that info and
push it into a modern process. If I were doing it, I'd avoid that time
sink and just start from scratch using new technologies and ideas. If
CEM was just starting today you can bet that they'd be doing that.

VLSI design classes are offered at many engineering colleges, often
companies (like the one I worked at) offer spare/scrap wafer space for
their final projects. Maybe Aaron (Lanterman) might have access to
such resources.


Tom


On 11/2/07, Dave Manley <dlmanley at sonic.net> wrote:
> Another option is a semi-custom approach such as the one offered by
> Array Design.  This is a company run by Hans Camenzind, who is probably
> better known as the designer of the 555 timer.  His idea is to predefine
> a family of die with varying numbers of transistors, resistors, etc.
> The design is then customized with metalization (similar to a Gate
> Array).  This should greatly reduce the cost and time to manufacture a
> part (assuming the family is at all active).  It wouldn't give you a
> exact clone, but it could enable making some interesting devices.
>
> http://www.arraydesign.com/
>
> The reference manual for the family is here:
>
> http://www.arraydesign.com/700series.html
>
>
> Hans is in his mid-70's at this point, so I wonder if this company is
> still an option.  I don't know if there are any other companies offering
> similar services.
>
> If you've never seen a book on designing analog ICs there is a free
> download by Hans here:
>
> http://www.designinganalogchips.com/
>
> Lots of good reference material on IC current mirrors, voltage
> references, diff amps, opamps, OTAs, etc.  Also some interesting
> historical information.
>
> -Dave
>
>
> >>
> >> Barry Klein wrote:
> >>> take a read of this discussion:
> >>> http://www.edn.com/blog/1700000170/post/1850011785.html
> >>> Read the last two paragraphs.  How is it going to be inexpensive
> >>> to make
> >>> your own IC?  How would any of us, even if we had 10K$ even proceed?
> >>> I suppose there is some university teaching this stuff but it is
> >>> not common
> >>> knowledge otherwise.  Are they hinting it will be?
> >>>> From discussion:
> >>>> AFAIK, nobody has produced a pin compatible 2040 or 3320 clone.
> >>> I believe that's correct, but there's nothing stopping anyone from
> >>> doing so if they felt it was worth the effort.
>
>
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