[sdiy-interim] 4046 PLL question

[harrybissell at copper.net]

I have not tried it...

I'm not sure of the 'wogglebug' method, I assume its the
same as that proposed by s-diy alumnus Bjorn Julin (BJ aka
you-know-who :^)

The problems are twofold...

You need a better quality capacitor because in the original
method... dielectric absorption errors are minimized because the
polatiry alternates constantly...

You might also have more error due to changes in supply
voltage. This could probably be handled with careful design.

The appnote method shows a pretty big cap (1uF) try getting
one without dielectric absorption (1uF polystyrene ???).

If its really a PLL the feedback might reduce any errors...

H^) harry

>
>
>---- Original Message ----
>From: dave at westphila.net
>To: synth-diy at vermine.org
>Subject: RE: [sdiy-interim] 4046 PLL question
>Date: Mon, 26 Mar 2007 14:46:18 -0400
>
>>I've been looking at an App Note covering the 4046 PLL (specifically
>a
>>TI App Note covering the 74HC and 74HCT4046, 7046, etc).
>>
>>http://www.etc.tuiasi.ro/cin/Downloads/pll/PLL-4046.pdf
>>
>>On page 26,27, fig.27 they discuss the use of capacitor splitting
>rather
>>than using a single charge capacitor which can adjust the duty cycle
>of
>>the oscillator.  If one capacitor was chosen to be very small then
>the
>>voltage across the other would approach a sawtooth.
>>
>>Since the voltage would have to be buffered, this may be no better
>that
>>the method used in Grant's Wogglebug to derive a saw from the 4046,
>but
>>has anyone experimented this method?  Used it on a CD4046?
>>
>>Dave
>>
>>____________________________________________________________________
>_
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>y



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