[sdiy] THE LM13600/LM13700 STORY

[ASSI]

On Thursday 12 July 2007 00:23, JH. wrote:
> >Ah, I didn't know that.  I think most people find it superior to the
> > 13600, not only in linearity, but in S/N and -- especialy -- in CV
> > rejection.
>
> Do you know what exactly they made wrong that leads to increased CV
> feedthru?

I don't think they did something wrong.  If you look at the chip photo, 
you can identify each transistor easily (tapered Darlington buffer at 
the top, pnp mirrors, npn mirrors, input differential pair, bias 
mirror, linearization diodes).  They are all done with (what appears to 
be minimum sized) single transistors with the exception of the buffer.  
Any single transistor more would have made the chip larger than was 
needed for all the pads to be placed.

> I'm asking because _theoretically_ the 13600's topology should have
> an advantage:
> The common mode signal at the input transistors is smaller than in a
> 3280. And normally a change of Vce will also cause a little change in
> offset voltage ot the
> differential pair. (according to the data sheet of really good
> monolithic matched pairs.)

The CMRR for the CA3280 topology is still higher due to the better 
process and improved matching from interdigitated layout.  The CA3280 
process is also much advanced as the GBW figure alone will tell you.  
The Achilles heel of the LM13600 is quite likely a low-beta pnp mirror.


Achim.
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