Sv: [sdiy] Digital VCO update

[Eric Brombaugh]

Michael Bacich wrote:
> I agree with Paul Maddox that a good frequency range would be from 
> 0.01 Hz to 1000 Hz.  Hopefully, your chip can handle that kind of range.

Of course it's possible, but there are tradeoffs. The ADC I use to 
digitize the CV is only 11 bits right now, so I'm limited to 2048 unique 
frequencies. In a 1V/Octave system with 10V range that's about 200 steps 
per octave. If you want 0.01Hz - 1000Hz that's 100x more range than  the 
current 20Hz - 20kHz system, almost 17 octaves! Clearly you'd either 
need a system with extremely fine resolution, or you provide a more 
limited instantaneous range and some sort of range select. Range select 
is fairly easy to do, but it requires more digital input pins, which 
argues for moving the DLFO design to the 20-pin PSoC.

Also, in a sampled system the closer you get to the sample rate the 
crunchier the waves look. To get accurate wave shapes at 1kHz would 
require pretty high sample rates which the PSoC may not be capable of. 
With a ~20kHz sample rate, I'd be a lot happier with a maximum output 
frequency in the 100-200Hz range to ensure at least 100 steps/cycle.

> I've been thinking about it a bit, and I'm not too worried that the 
> stepping is going to be too audible at slow rates.

That's good to know.

> Regarding waveforms, I think it would be really cool if you could 
> include a table for a so-called "hypertriangle" wave.

I've seen these. It wouldn't be hard to do.

Thanks for the suggestions.

Eric