[sdiy] Module Messing with my PSU (i think)

[Ian Fritz]

At 10:39 AM 3/31/06, Samppa Tolvanen wrote:
>On 3/31/06, Ian Fritz <ijfritz at earthlink.net> wrote:
> >
> > As I have mentioned several times before, I have never found a problem that
> > could be solved by piling on decoupling caps.
> >
>
>Now that Ian is here and piling bypass caps.
>
>How much we need those? "The separeted at the birth" brothers Patchell
>and Bissell make and use pro-boards with caps everywhere.
>
>Ian, any specific places to watch out?
>
>Samppa

Hi Samppa --

I use the procedure I was taught back in the '70s.

First, have decent sized (2-100 uF) tantalum caps where power enters the 
board.  Then follow the manufacturer's recommendation for critical chips 
(555 timer, etc.)  Then add some .1's here and there, about one pair for 
every three chips or so.

In addition watch for radiative coupling where there are sharp edges on the 
signals, e.g., output to input coupling around comparitor chips.  If there 
are high frequency spikes on the power lines, ferrite beads are usually 
quite effective in squelching them.

Finally, use heavy gauge wire for power distribution and try to use a 
star-type arrangement as much as possible.  Even on the individual boards 
if there are high-level and low-level circuit sections.

I've had good luck with this system, although I can see a tiny bit of 
crosstalk if I look hard enough.

   Ian